- 您现在的位置：买卖IC网 > PDF目录20606 > ISL8112IRZ-T (Intersil)IC REG DL BCK/LINEAR SYNC 32-QFN PDF资料下载
参数资料
| 型号： | ISL8112IRZ-T |
| 厂商： | Intersil |
| 文件页数： | 26/27页 |
| 文件大小： | 0K |
| 描述： | IC REG DL BCK/LINEAR SYNC 32-QFN |
| 标准包装： | 6,000 |
| 拓扑： | 降压（降压）同步（1），线性（LDO）（1） |
| 功能： | 任何功能 |
| 输出数： | 2 |
| 频率 - 开关： | 可调式 |
| 电压/电流 - 输出 1： | 控制器 |
| 电压/电流 - 输出 2： | 0.7 V ~ 4.5 V，200mA |
| 带 LED 驱动器： | 无 |
| 带监控器： | 无 |
| 带序列发生器： | 无 |
| 电源电压： | 4.5 V ~ 25 V |
| 工作温度： | -40°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN（5x5） |
| 包装： | 带卷 (TR) |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页当前第26页第27页
ISL8112
? Ensure that the VSEN_ connection to COUT_ is short and
direct. However, in some cases it may be desirable to
deliberately introduce some trace length between the
VSEN_ connector node and the output filter capacitor (see
the Stability Considerations section).
? Route high-speed switching nodes (BOOT_, UG_, PH_,
and LG_) away from sensitive analog areas (VREF1,
ILIM_, and FB_). Use PGND1 and PGND2 as an EMI
shield to keep radiated switching noise away from the IC's
feedback divider and analog bypass capacitors.
? Make all pin-strap control input connections (MODE,
ILIM_, etc.) to GND or VCC of the device.
Layout Procedure
Place the power components first with ground terminals
adjacent (Q2/Q4 source, CIN_, COUT_). If possible, make
all these connections on the top layer with wide, copper-filled
areas.
Mount the controller IC adjacent to the synchronous rectifier
MOSFETs close to the hottest spot, preferably on the back
On the board's top side (power planes), make a star ground
to minimize crosstalk between the two sides. The top-side
star ground is a star connection of the input capacitors and
synchronous rectifiers. Keep the resistance low between the
star ground and the source of the synchronous rectifiers for
accurate current limit. Connect the top-side star ground
(used for MOSFET, input, and output capacitors) to the small
island with a single short, wide connection (preferably just a
via). Create PGND islands on the layer just below the
top-side layer (refer to the ISL8112 EV kit for an example) to
act as an EMI shield if multiple layers are available (highly
recommended). Connect each of these individually to the
star ground via, which connects the top side to the PGND
plane. Add one more solid ground plane under the device to
act as an additional shield, and also connect the solid
ground plane to the star ground via.
Connect the output power planes (VCORE and system
ground planes) directly to the output filter capacitor positive
and negative terminals with multiple vias.
side in order to keep UG_, GND, and the LG_ gate drive
lines short and wide. The LG_ gate trace must be short and
wide, measuring 50 mils to 100 mils wide if the MOSFET is
1” from the controller device.
Group the gate-drive components (BOOT_ capacitor, VIN
bypass capacitor) together near the controller device.
Make the DC/DC controller ground connections as follows:
1. Near the device, create a small analog ground plane.
2. Connect the small analog ground plane to GND and use
the plane for the ground connection for the VREF1 and
VCC bypass capacitors, FB dividers and ILIM resistors (if
any).
3. Create another small ground island for PGND and use
the plane for the VIN bypass capacitor, placed very close
to the device.
4. Connect the GND and PGND planes together at the
metal tab under device.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
26
FN6396.1
August 10, 2010
相关PDF资料 |
PDF描述 |
|---|---|
| EBM10DRKS | CONN EDGECARD 20POS DIP .156 SLD |
| SS10P3C-M3/87A | DIODE SCHOTTKY 10A 30V SMPC |
| ASC40DREF | CONN EDGECARD 80POS .100 EYELET |
| RMC08DREI | CONN EDGECARD 16POS .100 EYELET |
| SS10P2CL-M3/87A | DIODE SCHOTTKY 10A 20V SMPC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ISL8115 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High Voltage Synchronous Buck PWM Controller with Integrated Gate Driver and Current Sharing Capability |
| ISL8115EVAL1Z | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High Voltage Synchronous Buck PWM Controller with Integrated Gate Driver and Current Sharing Capability |
| ISL8115EVAL2Z | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High Voltage Synchronous Buck PWM Controller with Integrated Gate Driver and Current Sharing Capability |
| ISL8115FRTZ | 制造商:Intersil Corporation 功能描述:40V SYNCHRONOUS PWM CONTROLLER W/CURRENT SHARING - 4X4 24LD - Rail/Tube 制造商:Intersil Corporation 功能描述:IC REG CTRLR BUCK PWM 24-TQFN 制造商:Intersil Corporation 功能描述:PWM CONTROLLER, BUCK, 5.5V, TQFN-24, Input Voltage:36V, Output Current:30A, Supply Voltage Min:2.97V, Supply Voltage Max:5.5V, Digital IC Case Style:TQFN, No. of Pins:24, Frequency:1.5MHz, Operating Temperature Min:-40C |
| ISL8115FRTZ-T | 制造商:Intersil Corporation 功能描述:40V SYNCHRONOUS PWM CONTROLLER W/CURRENT SHARING - 4X4 24LD - Tape and Reel 制造商:Intersil Corporation 功能描述:IC REG CTRLR BUCK PWM 24-TQFN 制造商:Intersil Corporation 功能描述:PWM CONTROLLER, BUCK, 5.5V, TQFN-24, Input Voltage:36V, Output Current:30A, Supply Voltage Min:2.97V, Supply Voltage Max:5.5V, Digital IC Case Style:TQFN, No. of Pins:24, Frequency:1.5MHz, Operating Temperature Min:-40C |
发布紧急采购，3分钟左右您将得到回复。