参数资料
型号: ISL9216IRZ
厂商: Intersil
文件页数: 17/33页
文件大小: 0K
描述: IC MULTI-CELL LI-ION PROT 32-QFN
标准包装: 60
功能: 电池监控器
电池化学: 锂离子(Li-Ion)
电源电压: 9.2 V ~ 31 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘
供应商设备封装: 32-QFN 裸露焊盘(5x5)
包装: 管件
产品目录页面: 1245 (CN2011-ZH PDF)
ISL9216, ISL9217
TABLE 5. ANALOG OUT CONTROL REGISTER (ADDR: 03H)
BITS
7
6
5:4
FUNCTION
UFLG1
User Flag 1
UFLG0
User Flag 0
RESERVED
DESCRIPTION
General purpose flag usable by microcontroller software. This bit is battery backed up, even when RGO turns off.
General purpose flag usable by microcontroller software. This bit is battery backed up, even when RGO turns off.
Reserved for future expansion
BIT 3
BIT 2
BIT 1
BIT 0
AO3
0
0
0
0
0
0
0
0
1
1
1
1
AO2
0
0
0
0
1
1
1
1
0
0
x
1
AO1
0
0
1
1
0
0
1
1
0
0
1
x
AO0
0
1
0
1
0
1
0
1
0
1
x
x
No Output (low power state)
VCELL1
VCELL2
VCELL3
VCELL4
VCELL5
VCELL6
VCELL7
External Temperature
Internal Temperature
Reserved
Reserved
OUTPUT VOLTAGE
TABLE 6. FET CONTROL REGISTER (ADDR: 04H)
BIT
7
6
5:2
1
0
FUNCTION
SLEEP
Force Sleep
LDMONEN
Turn on VMON
connection
(ISL9216 only)
RESERVED
CFET
(ISL9216 only)
DFET
(ISL9216 only)
DESCRIPTION
Setting this bit to “1” forces the device to go into a sleep condition. This turns off both FET outputs, the cell balance
outputs and the voltage regulator. This also resets the CFET, DFET, and CB7ON:CB1ON bits. The SLEEP bit is
automatically reset to “0” when the device wakes up. This does not reset the AO3:AO0 bits.
Writing a “1” to this bit turns on the VMON circuit. Writing a “0” to this bit turns off the VMON circuit. As such, the
microcontroller has full control of the operation of this circuit.
Reserved for future expansion.
Setting this bit to “1” turns on the charge FET.
Setting this bit to “0” turns off the charge FET.
This bit is automatically reset in the event of a charge overcurrent condition, unless the automatic response is disabled
by the DENOCC bit.
Setting this bit to “1” turns on the discharge FET.
Setting this bit to “0” turns off the discharge FET.
This bit is automatically reset in the event of a discharge overcurrent or discharge short circuit condition, unless the
automatic response is disabled by the DENOCD or DENSCD bits.
17
FN6488.1
November 2, 2007
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