参数资料
型号: ISLA118P50IRZ
厂商: Intersil
文件页数: 30/34页
文件大小: 0K
描述: IC ADC 8BIT SPI/SRL 500M 72QFN
产品培训模块: Solutions for Test and Measurement Equipment
标准包装: 1
系列: FemtoCharge™
位数: 8
采样率(每秒): 500M
数据接口: 串行,SPI?
转换器数目: 2
功率耗散(最大): 477mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 72-VFQFN 裸露焊盘
供应商设备封装: 72-QFN(10x10)
包装: 托盘
输入数目和类型: 2 个单端,单极;1 个差分,单极
ISLA118P50
5
FN7565.2
July 25, 2011
Absolute Maximum Ratings
Thermal Information
AVDD to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.4V to 2.1V
OVDD to OVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.4V to 2.1V
AVSS to OVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 0.3V
Analog Inputs to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to AVDD + 0.3V
Clock Inputs to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to AVDD + 0.3V
Logic Input to AVSS . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to OVDD + 0.3V
Logic Inputs to OVSS . . . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to OVDD + 0.3V
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
72 Ld QFN (Notes 3, 4, 5) . . . . . . . . . . . . . .
23
0.75
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
3.
θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379 for details.
4. For
θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
5. For solder stencil layout and reflow guidelines, please see Tech Brief TB389.
Electrical Specifications All specifications apply under the following conditions unless otherwise noted: AVDD = 1.8V, OVDD = 1.8V,
TA = -40°C to +85°C (typical specifications at +25°C), AIN = -1dBFS, FIN =105MHz, fSAMPLE = 500MSPS, after completion of I2E calibration.
PARAMETER
SYMBOL
CONDITIONS
ISLA118P50
(Note 6)
UNITS
MIN
TYP
MAX
DC SPECIFICATIONS (Note 6)
Analog Input
Full-Scale Analog Input Range
VFS
Differential
1.41
1.45
1.52
VP-P
Input Resistance
RIN
Differential
500
Ω
Input Capacitance
CIN
Differential
1.9
pF
Full Scale Range Temp. Drift
AVTC
Full Temp
325
ppm/°C
Input Offset Voltage
VOS
-10
±2.0
10
mV
Gain Error
EG
±2.0
%
Common-Mode Output Voltage
VCM
435
535
635
mV
Clock Inputs
Inputs Common Mode Voltage
0.9
V
CLKP, CLKN Input Swing
0.2
1.8
V
Power Requirements
1.8V Analog Supply Voltage
AVDD
1.7
1.8
1.9
V
1.8V Digital Supply Voltage
OVDD
1.7
1.8
1.9
V
1.8V Analog Supply Current
IAVDD
173
186
mA
1.8V Digital Supply Current (Note 7)
IOVDD
3mA LVDS, I2E powered down, Notch
Filter powered down
72
79
mA
3mA LVDS, I2E On, Notch Filter On
117
mA
Power Supply Rejection Ratio
PSRR
30MHz, 200mVP-P
-36
dB
Total Power Dissipation
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