参数资料
型号: ISPPAC-POWR604-01TN44I
厂商: Lattice Semiconductor Corporation
文件页数: 3/30页
文件大小: 0K
描述: IC ISP POWER MGR ANLG/LOG 44TQFP
标准包装: 160
系列: ispPAC®
应用: 电源监控器,序列发生器
输入电压: 0 V ~ 6 V
电源电压: 2.25 V ~ 5.5 V
电流 - 电源: 10mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 44-LQFP
供应商设备封装: 44-TQFP(10x10)
包装: 托盘
Lattice Semiconductor
ispPAC-POWR604 Data Sheet
Power Supply Sequence Controller and Monitor
The ispPAC-POWR604 device is speci?cally designed as a fully-programmable power supply sequencing controller
and monitor for managing up to four separate power supplies, as well as monitoring up to six analog inputs or sup-
plies. The ispPAC-POWR604 device contains an internal PLD that is programmable by the user to implement digi-
tal logic functions and control state machines. The internal PLD connects to two programmable timers, special
purpose I/O and the programmable monitoring circuit blocks. The internal PLD and timers can be clocked by either
an internal programmable clock oscillator or an external clock source.
The voltage monitors are arranged as six independent comparators each with 192 programmable trip point set-
tings. Monitoring levels are set around the following standard voltages: 1.2V, 1.5V, 1.8V, 2.5V, 3.3V or 5.0V.
All six voltages can be monitored simultaneously (i.e., continuous-time operation). Other non-standard voltage lev-
els can be accounted for using various scale factors.
For added robustness, the comparators feature a variable hysteresis that scales with the voltage they monitor.
Generally, a larger hysteresis is better. However, as power supply voltages get smaller, that hysteresis increasingly
affects trip-point accuracy. Therefore, the hysteresis is +/-16mV for 5V supplies and scales down to +/-3mV for 1.2V
supplies, or about 0.3% of the trip point.
The programmable logic functions consist of a block of 20 inputs with 41 product terms and eight macrocells. The
architecture supports the sharing of product terms to enhance the overall usability.
The four output pins are open-drain outputs. These outputs can be used to drive enable lines for DC/DC converters
or other control logic associated with power supply control. The four outputs are driven from the macrocells.
Figure 2-1. ispPAC-POWR604 Block Diagram
ispPAC-POWR604
6
COMP1
VMON1
VMON2
VMON3
VMON4
VMON5
VMON6
Analog
Inputs
6
Sequence
Controller
CPLD
Comparator
Outputs
COMP2
COMP3
COMP4
COMP5
COMP6
20 I/P & 8
Macrocell
GLB
IN1
IN2
IN3
IN4
RESET
Digital
Inputs
5
250kHz
Internal
OSC
4
Logic
Outputs
OUT5
OUT6
OUT7
OUT8
2 Timers
CLKIO
2-2
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