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| 型号： | KIT33887PNBEVB |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 21/37页 |
| 文件大小： | 0K |
| 描述： | KIT EVAL 33887 5A H-BRIDGE PQFN |
| 标准包装： | 1 |
| 主要目的： | 电源管理，H 桥驱动器（内部 FET） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | MC33887 |
| 主要属性： | 5A 5 ~ 28V PWM 至 20kHz 有源电流限制 |
| 次要属性： | 故障状态，睡眠模式，比例电流镜像输出 |
| 已供物品： | 板，CD |
| 相关产品： | MC33887DWBR2-ND - IC H-BRIDGE 5A LOAD FDBK 54-SOIC MC33887VWR2-ND - IC H-BRIDGE 5.0A W/CS 20-HSOP MC33887PNBR2-ND - IC H-BRIDGE 5A CURR FDBK 36-PQFN MC33887PNB-ND - IC H-BRIDGE CURR FDBK 5A 36-PQFN MC33887DHR2-ND - IC H-BRIDGE 5A CURR FDBK 20-HSOP MC33887VW-ND - IC H-BRIDGE 5.0A W/CS 20-HSOP MC33887DWB-ND - IC H-BRIDGE 5.0A W/CS 54-SOIC MC33887DH-ND - IC H-BRIDGE 5.0A W/CS 20-HSOP |
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FUNCTIONAL DESCRIPTION
INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
Numerous protection and operational features (speed,
torque, direction, dynamic braking, PWM control, and closed-
loop control), in addition to the 5.0 A current capability, make
the 33887 a very attractive, cost-effective solution for
pair of 33887 devices can be used to control bipolar stepper
motors. The 33887 can also be used to excite transformer
primary windings with a switched square wave to produce
secondary winding AC currents.
controlling a broad range of small DC motors. In addition, a
FUNCTIONAL PIN DESCRIPTIONS
POWER GROUND AND ANALOG GROUND
(PGND AND AGND)
Power and analog ground pins should be connected
together with a very low impedance connection.
POSITIVE POWER SUPPLY (V+)
V+ pins are the power supply inputs to the device. All V+
pins must be connected together on the printed circuit board
with as short as possible traces offering as low impedance as
possible between pins.
V+ pins have an undervoltage threshold. If the supply
voltage drops below a V+ undervoltage threshold, the output
power stage switches to a tri-state condition and the fault
status flag is SET and the Fault Status pin voltage switched
to a logic LOW. When the supply voltage returns to a level
that is above the threshold, the power stage automatically
resumes normal operation according to the established
condition of the input pins and the fault status flag is
automatically reset logic HIGH.
As V+ increases in value above 28 V, the charge pump
performance begins to degrade. At +40 V, the charge pump
is effectively non-functional. Operation at this high voltage
level will result in the output FETs not being enhanced when
turned on. This means that the voltage on the output will be
V OUT = (V+) – V GS . This increased voltage drop under load
will produce a higher power dissipation.
FAULT STATUS (FS)
The FS pin is the device fault status output. This output is
an active LOW open drain structure requiring a pull-up
LOGIC INPUT CONTROL AND DISABLE
(IN1, IN2, D1, AND D2)
These pins are input control pins used to control the
outputs. These pins are 5.0 V CMOS-compatible inputs with
hysteresis. The IN1 and IN2 independently control OUT1 and
OUT2, respectively. D1 and D2 are complementary inputs
used to tri-state disable the H-Bridge outputs.
When either D1 or D2 is SET (D1 = logic HIGH or D2 =
logic LOW) in the disable state, outputs OUT1 and OUT2 are
both tri-state disabled; however, the rest of the circuitry is fully
operational and the supply I Q (standby) current is reduced to a
few milliamperes. Refer to Table 6, Truth Table , and STATIC
ELECTRICAL CHARACTERISTICS table, page 9 .
H-BRIDGE OUTPUT (OUT1 AND OUT2)
These pins are the outputs of the H-Bridge with integrated
output MOSFET body diodes. The bridge output is controlled
using the IN1, IN2, D1, and D2 inputs. The low-side
MOSFETs have active current limiting above the I LIM
threshold. The outputs also have thermal shutdown (tri-state
latch-OFF) with hysteresis as well as short circuit latch-OFF
protection.
A disable timer (time t b ) USED to detect currents that are
higher than current limit is activated at each output activation
to facilitate hard short detection (see Figure 11 , page 13 ).
Charge Pump Capacitor (CCP)
A filter capacitor (up to 33 nF) can be connected from the
charge pump output pin and PGND. The device can operate
without the external capacitor, although the C CP capacitor
helps to reduce noise and allows the device to perform at
maximum speed, timing, and PWM frequency.
ENABLE (EN)
The EN pin is used to place the device in a sleep mode so
as to consume very low currents. When the EN pin voltage is
a logic LOW state, the device is in the sleep mode. The
device is enabled and fully operational when the EN pin
voltage is logic HIGH. An internal pull-down resistor
maintains the device in sleep mode in the event EN is driven
through a high impedance I/O or an unpowered
microcontroller, or the EN input becomes disconnected.
FEEDBACK FOR H-BRIDGE (FB)
The 33887 has a feedback output (FB) for “real time”
monitoring of H-Bridge high-side current to facilitate closed-
loop operation for motor speed and torque control.
The FB pin provides current sensing feedback of the
H-Bridge high-side drivers. When running in forward or
reverse direction, a ground referenced 1/375th (0.00266) of
load current is output to this pin. Through an external resistor
to ground, the proportional feedback current can be
converted to a proportional voltage equivalent and the
controlling microcontroller can “read” the current proportional
33887
Analog Integrated Circuit Device Data
Freescale Semiconductor
21
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