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参数资料
| 型号： | KIT33887PNBEVB |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 4/37页 |
| 文件大小： | 0K |
| 描述： | KIT EVAL 33887 5A H-BRIDGE PQFN |
| 标准包装： | 1 |
| 主要目的： | 电源管理，H 桥驱动器（内部 FET） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | MC33887 |
| 主要属性： | 5A 5 ~ 28V PWM 至 20kHz 有源电流限制 |
| 次要属性： | 故障状态，睡眠模式，比例电流镜像输出 |
| 已供物品： | 板，CD |
| 相关产品： | MC33887DWBR2-ND - IC H-BRIDGE 5A LOAD FDBK 54-SOIC MC33887VWR2-ND - IC H-BRIDGE 5.0A W/CS 20-HSOP MC33887PNBR2-ND - IC H-BRIDGE 5A CURR FDBK 36-PQFN MC33887PNB-ND - IC H-BRIDGE CURR FDBK 5A 36-PQFN MC33887DHR2-ND - IC H-BRIDGE 5A CURR FDBK 20-HSOP MC33887VW-ND - IC H-BRIDGE 5.0A W/CS 20-HSOP MC33887DWB-ND - IC H-BRIDGE 5.0A W/CS 54-SOIC MC33887DH-ND - IC H-BRIDGE 5.0A W/CS 20-HSOP |
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PIN CONNECTIONS
Transparent Top View of Package
NC
D1
IN2
EN
V+
V+
NC
AGND
FS
NC
1
2
3
4
5
6
7
8
9
10
28
27
26
25
24
23
22
21
20
19
NC
D2
PGND
PGND
PGND
PGND
PGND
PGND
FB
NC
Figure 4. 33887 Pin Connections
Table 2. PQFN PIN DEFINITIONS
A functional description of each pin can be found in the Functional Pin DescriptionS section, page 21 .
Pin
1, 7, 10, 16,
Pin Name
NC
Formal Name
No Connect
Definition
No internal connection to this pin.
19, 28, 31
2
D1
Disable 1
Active HIGH input used to simultaneously tri-state disable both H-Bridge
outputs. When D1 is Logic HIGH, both outputs are tri-stated.
3
4
IN2
EN
Logic Input Control 2
Enable
Logic input control of OUT2 (i.e., IN2 logic HIGH = OUT2 HIGH).
Logic input Enable control of device (i.e., EN logic HIGH = full operation,
EN logic LOW = Sleep Mode).
5, 6, 12, 13, 34, 35
8
9
V+
AGND
FS
Positive Power Supply
Analog Ground
Fault Status for H-Bridge
Positive supply connections.
Low-current analog signal ground.
Open drain active LOW Fault Status output requiring a pull-up resistor to
5.0 V.
11
14, 15, 17, 18
20
IN1
OUT1
FB
Logic Input Control 1
H-Bridge Output 1
Feedback for H-Bridge
Logic input control of OUT1 (i.e., IN1 logic HIGH = OUT1 HIGH).
Output 1 of H-Bridge.
Current feedback output providing ground referenced 1/375th ratio of
H-Bridge high-side current.
21– 26
27
PGND
D2
Power Ground
Disable 2
High-current power ground.
Active LOW input used to simultaneously tri-state disable both H-Bridge
outputs. When D2 is Logic LOW, both outputs are tri-stated.
29, 30, 32, 33
36
OUT2
CCP
H-Bridge Output 2
Charge Pump Capacitor
Output 2 of H-Bridge.
External reservoir capacitor connection for internal charge pump
capacitor.
Pad
Thermal
Interface
Exposed Pad Thermal
Interface
Exposed pad thermal interface for sinking heat from the device.
Note: Must be DC-coupled to analog ground and power ground via very
low impedance path to prevent injection of spurious signals into IC
substrate.
33887
Analog Integrated Circuit Device Data
4
Freescale Semiconductor
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