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| 型号： | KSZ8841-16MQL |
| 厂商： | Micrel Inc |
| 文件页数： | 28/105页 |
| 文件大小： | 0K |
| 描述： | IC MAC CTRLR 8/16BIT 128-PQFP |
| 标准包装： | 66 |
| 控制器类型： | 以太网控制器，MAC |
| 接口： | 总线 |
| 电源电压： | 3.1 V ~ 3.5 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 128-BFQFP |
| 供应商设备封装： | 128-PQFP（14x20） |
| 包装： | 托盘 |
| 产品目录页面： | 1080 (CN2011-ZH PDF) |
| 配用： | 576-1631-ND - BOARD EVALUATION KSZ8841-16MQL |
| 其它名称： | 576-2112 KSZ8841-16MQL-ND |
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Micrel, Inc.
KSZ8841-16/32 MQL/MVL/MBL
October 2007
29
M9999-102207-1.6
100BASE-TX Receive
The 100BASE-TX receiver function performs adaptive equalization, DC restoration, MLT3-to-NRZI conversion, data and
clock recovery, NRZI-to-NRZ conversion, de-scrambling, 4B/5B decoding, and serial-to-parallel conversion.
The receiving side starts with the equalization filter to compensate for inter-symbol interference (ISI) over the twisted pair
cable. Since the amplitude loss and phase distortion is a function of the cable length, the equalizer has to adjust its
characteristics to optimize performance. In this design, the variable equalizer makes an initial estimation based on
comparisons of incoming signal strength against some known cable characteristics, and then tunes itself for optimization.
This is an ongoing process and self-adjusts against environmental changes such as temperature variations.
Next, the equalized signal goes through a DC restoration and data conversion block. The DC restoration circuit is used to
compensate for the effect of baseline wander and to improve the dynamic range. The differential data conversion circuit
converts the MLT3 format back to NRZI. The slicing threshold is also adaptive.
The clock recovery circuit extracts the 125MHz clock from the edges of the NRZI signal. This recovered clock is then used
to convert the NRZI signal into the NRZ format. This signal is sent through the de-scrambler followed by the 4B/5B
decoder. Finally, the NRZ serial data is converted to an MII format and provided as the input data to the MAC.
PLL Clock Synthesizer (Recovery)
The internal PLL clock synthesizer generates 125MHz, 62.5MHz, 41.66MHz, and 25MHz clocks by setting the on-chip
bus speed control register for KSZ8841M system timing. These internal clocks are generated from an external 25Mhz
crystal or oscillator.
Scrambler/De-scrambler (100BASE-TX Only)
The purpose of the scrambler is to spread the power spectrum of the signal to reduce electromagnetic interference (EMI)
and baseline wander.
Transmitted data is scrambled through the use of an 11-bit wide linear feedback shift register (LFSR). The scrambler
generates a 2047-bit non-repetitive sequence. Then the receiver de-scrambles the incoming data stream using the same
sequence as at the transmitter.
10BASE-T Transmit
The 10BASE-T driver is incorporated with the 100BASE-TX driver to allow for transmission using the same magnetics.
They are internally wave-shaped and pre-emphasized into outputs with a typical 2.4V amplitude. The harmonic contents
are at least 27dB below the fundamental frequency when driven by an all-ones Manchester-encoded signal.
10BASE-T Receive
On the receive side, input buffers and level detecting squelch circuits are employed. A differential input receiver circuit and
a phase-locked loop (PLL) perform the decoding function.
The Manchester-encoded data stream is separated into clock signal and NRZ data. A squelch circuit rejects signals with
levels less than 400mV or with short pulse widths to prevent noise at the RXP-or-RXM input from falsely triggering the
decoder. When the input exceeds the squelch limit, the PLL locks onto the incoming signal and the KSZ8841M decodes a
data frame.
The receiver clock is maintained active during idle periods in between data reception.
MDI/MDI-X Auto Crossover
To eliminate the need for crossover cables between similar devices, the KSZ8841M supports HP-Auto MDI/MDI-X and
IEEE 802.3u standard MDI/MDI-X auto crossover. HP-Auto MDI/MDI-X is the default.
The auto-sense function detects remote transmit and receive pairs and correctly assigns the transmit and receive pairs for
the KSZ8841M device. This feature is extremely useful when end users are unaware of cable types in addition to saving
on an additional uplink configuration connection. The auto-crossover feature can be disabled through the port control
registers.
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| KSZ8841-16MQL A6 | 功能描述:IC MAC CTRLR 8/16BIT 128-PQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 控制器 系列:- 标准包装:4,900 系列:- 控制器类型:USB 2.0 控制器 接口:串行 电源电压:3 V ~ 3.6 V 电流 - 电源:135mA 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:36-VFQFN 裸露焊盘 供应商设备封装:36-QFN（6x6） 包装:* 其它名称:Q6396337A |
| KSZ8841-16MQL-EVAL | 功能描述:以太网开发工具 KSZ8841-16MQL Evaluation Board RoHS:否 制造商:Micrel 产品:Evaluation Boards 类型:Ethernet Transceivers 工具用于评估:KSZ8873RLL 接口类型:RMII 工作电源电压: |
| KSZ8841-16MVL | 功能描述:以太网 IC Single Ethernet Port + Generic (8, 16-bit) bus interface(Lead Free) RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| KSZ8841-16MVL TR | 功能描述:以太网 IC Single Ethernet Port + Generic (8, 16-bit) bus interface(Lead Free) RoHS:否 制造商:Micrel 产品:Ethernet Switches 收发器数量:2 数据速率:10 Mb/s, 100 Mb/s 电源电压-最大:1.25 V, 3.45 V 电源电压-最小:1.15 V, 3.15 V 最大工作温度:+ 85 C 封装 / 箱体:QFN-64 封装:Tray |
| KSZ8841-16MVL-EVAL | 功能描述:BOARD EVALUATION KSZ8841-16MVL RoHS:是 类别:编程器，开发系统 >> 过时/停产零件编号 系列:- 标准包装:1 系列:- 类型:MCU 适用于相关产品:Freescale MC68HC908LJ/LK（80-QFP ZIF 插口） 所含物品:面板、缆线、软件、数据表和用户手册 其它名称:520-1035 |
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