参数资料
型号: L6740L
厂商: STMICROELECTRONICS
元件分类: 模拟信号调理
英文描述: SPECIALTY ANALOG CIRCUIT, PQFP48
封装: 7 X 7 MM, 1 MM HEIGHT, HTQFP-48
文件页数: 27/44页
文件大小: 755K
代理商: L6740L
L6740L
Output voltage monitoring and protections
Figure 13.
FB disconnection protection
7.3
PWRGOOD
It is an open-drain signal set free after the soft-start sequence has finished; it is the logic
AND between the internal CORE and NB PGOOD (or just the CORE PGOOD in PVI mode).
It is pulled low when the output voltage of one of the two sections drops 250 mV below the
programmed voltage. It is masked during on-the-fly VID transitions as well as when the
CORE section is set to OFF (from SVI bus) while the NB section is still operative.
7.4
Over-current
The over-current threshold has to be programmed to a safe value, in order to be sure that
each section doesn't enter OC during normal operation of the device. This value must take
into consideration also the extra current needed during the OTF-VID Transition (IOTF-VID)
and the process spread and temperature variations of the sensing elements (DCR and
RDS(on)).
Moreover, since also the internal threshold spreads, the design has to consider the mini-
mum/maximum values of the threshold. Considering the reading method, the two sections
will show different behaviors in OC.
7.4.1
CORE section
L6740L performs two different OC protections for the CORE section: it monitors both the
average current and the per-phase current and allows to set an OC threshold for both.
OC_PHASE pin allows to define a maximum information current per-phase
(IINFOx). A ROC_TH resistor connected to SGND allows to define an end-of-scale
current (IOC_TH) that is compared with the information current generated for each
phase (IINFOx). If the current information for the single phase exceed the
programmed end-of-scale current (i.e. if IINFOx > IOC_TH), the device will turn-on
the LS mosfet until the threshold is re-crossed (i.e. until IINFOx < IOC_TH).
OC_AVG pin allows to define a maximum total output current for the system
(IOC_AVG). A copy of the DROOP current is sourced from the OC_AVG/LI pin. By
connecting a resistor ROC_AVG to SGND, a load indicator with 2.5 V (VOC_AVGTH)
end-of-scale can be implemented. This means that when the voltage present at
the LI pin crosses VOC_AVGTH, the device detects an average OC (OC_AVG) and
immediately latches with all the mosfets of all the sections OFF (HiZ).
CORE_REFERENCE
FB
COMP
VSEN
FBG
RF
CF
RFB
To VDD_CORE
(Remote Sense)
from DAC...
NB_REFERENCE
NB_FB
NB_COMP
NB_VSEN
NB_FBG
RF_NB
CF_NB
RFB_NB
To VDD_NB
(Remote Sense)
CORE SECTION - VSEN AND FBG DISCONNECTION
NB SECTION - NB_VSEN AND NB_FBR DISCONNECTION
500mV
FBG DISCONNECTED
CS1-
VSEN
DISCONNECTED
30
μ
A
50
μ
A
from DAC...
500mV
FBG DISCONNECTED
600mV
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