
INPUT CAPACITORS
The regulator input supply voltage typically has high source
impedance at the switching frequency. Good quality input ca-
pacitors are necessary to limit the ripple voltage at the VIN
pin while supplying most of the switch current during the on-
time. When the buck switch turns on, the current into the buck
switch steps to the valley of the inductor current waveform,
ramps up to the peak value, and then drops to the zero at turn-
off. The input capacitance should be selected for RMS current
rating and minimum ripple voltage. A good approximation for
the required ripple current rating necessary is I
RMS > IOUT / 2.
Seven 2.2
μF ceramic capacitors were used for each channel.
With ceramic capacitors, the input ripple voltage will be trian-
gular. The input ripple voltage with one channel operating is
approximately:
(24)
(25)
The ripple voltage of the input capacitors will be reduced sig-
nificantly with dual channel operation since each channel
operates 180 degrees out of phase from the other. Capacitors
connected in parallel should be evaluated for RMS current
rating. The current will split between the input capacitors
based on the relative impedance of the capacitors at the
switching frequency.
When the converter is connected to an input power source, a
resonant circuit is formed by the line inductance and the input
capacitors. To minimize overshoot make C
IN > 10 x LIN. The
characteristic source impedance (Z
S) and resonant frequency
(f
S) are:
(26)
(27)
Where L
IN is the inductance of the input wire. The converter
exhibits negative input impedance which is lowest at the min-
imum input voltage:
(28)
The damping factor for the input filter is given by:
(29)
Where R
IN is the input wiring resistance and ESR is the equiv-
alent series resistance of the input capacitors. When
δ = 1,
the input filter is critically damped. This may be difficult to
achieve with practical component values. With
δ < 0.2, the
input filter will exhibit significant ringing. If
δ is zero or nega-
tive, there is not enough resistance in the circuit and the input
filter will sustain an oscillation. When operating near the min-
imum input voltage, a bulk aluminum electrolytic capacitor
across C
IN may be needed to damp the input for a typical
bench test setup.
VCC CAPACITOR
The primary purpose of the VCC capacitor (C
VCC) is to supply
the peak transient currents of the LO driver and bootstrap
diode as well as provide stability for the VCC regulator. These
peak currents can be several amperes. The recommended
value of C
VCC should be no smaller than 0.47F, and should
be a good quality, low ESR, ceramic capacitor located at the
pins of the IC to minimize potentially damaging voltage tran-
sients caused by trace inductance. A value of 1
μF was se-
lected for this design.
BOOTSTRAP CAPACITOR
The bootstrap capacitor between the HB and SW pins sup-
plies the gate current to charge the high-side MOSFET gate
at each cycle’s turn-on and recovery charge for the bootstrap
diode. These current peaks can be several amperes. The
recommended value of the bootstrap capacitor is at least
0.1
μF, and should be a good quality, low ESR, ceramic ca-
pacitor located at the pins of the IC to minimize potentially
damaging voltage transients caused by trace inductance. The
absolute minimum value for the bootstrap capacitor is calcu-
lated as:
(30)
Q
g is the high-side MOSFET gate charge and ΔVHB is the
tolerable voltage droop on C
HB, which is typically less than
5% of VCC. A value of 0.47
μF was selected for this design.
SOFT START CAPACITOR
The capacitor at the SS pin (C
SS) determines the soft-start
time (t
SS), which is the time for the output voltage to reach the
final regulated value. The value of C
SS for a given time is de-
termined from:
(31)
For this application, a value of 0.047
μF was chosen for a soft-
start time of 3.8ms.
RESTART CAPACITOR
The restart pin sources 10A into the external restart capac-
itor (C
RES). The value of the restart capacitor is given by:
(32)
Where t
RES is the time the LM25119 remains off before a
restart attempt in hiccup mode current limiting. For this appli-
cation, a value of 0.47F was chosen for a restart time of
59ms.
OUTPUT VOLTAGE DIVIDER
R
FB1 and RFB2 set the output voltage level, the ratio of these
resistors is calculated from:
(33)
2.21k
was chosen for R
FB1 in this design which results in a
R
FB2 value of 6.98k for VOUT1 of 3.3V. A reasonable guide
is to select the value of R
FB1 in the range between 500 and
10k
. The value of R
FB1 should be large enough to keep the
total divider power dissipation small.
17
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LM25119