参数资料
型号: LPC2294JBD144,551
厂商: NXP Semiconductors
文件页数: 2/54页
文件大小: 0K
描述: IC ARM7 MCU FLASH 256K 144-LQFP
标准包装: 60
系列: LPC2200
核心处理器: ARM7
芯体尺寸: 16/32-位
速度: 60MHz
连通性: CAN,EBI/EMI,I²C,Microwire,SPI,SSI,SSP,UART/USART
外围设备: POR,PWM,WDT
输入/输出数: 112
程序存储器容量: 256KB(256K x 8)
程序存储器类型: 闪存
RAM 容量: 16K x 8
电压 - 电源 (Vcc/Vdd): 1.65 V ~ 3.6 V
数据转换器: A/D 8x10b
振荡器型: 内部
工作温度: -40°C ~ 105°C
封装/外壳: 144-LQFP
包装: 托盘
配用: OM10091-ND - KIT DEV PHYCORE-ARM7/LPC2220
568-1757-ND - BOARD EVAL FOR LPC220X ARM MCU
其它名称: 568-1898
935275728551
LPC2294JBD144-S
LPC2292_2294
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 8 — 8 June 2011
10 of 54
NXP Semiconductors
LPC2292/2294
16/32-bit ARM microcontrollers with external memory interface
P0[27]/AIN0/
CAP0[1]/
MAT0[1]
H3[6]
I
AIN0 — ADC, input 0. This analog input is always connected
to its pin.
I
CAP0[1] — Capture input for Timer 0, channel 1.
O
MAT0[1] — Match output for Timer 0, channel 1.
P0[28]/AIN1/
CAP0[2]/
MAT0[2]
J1[6]
I
AIN1 — ADC, input 1. This analog input is always connected
to its pin.
I
CAP0[2] — Capture input for Timer 0, channel 2.
O
MAT0[2] — Match output for Timer 0, channel 2.
P0[29]/AIN2/
CAP0[3]/
MAT0[3]
I
AIN2 — ADC, input 2. This analog input is always connected
to its pin.
I
CAP0[3] — Capture input for Timer 0, Channel 3.
O
MAT0[3] — Match output for Timer 0, channel 3.
P0[30]/AIN3/
EINT3/CAP0[0]
I
AIN3 — ADC, input 3. This analog input is always connected
to its pin.
I
EINT3 — External interrupt 3 input.
I
CAP0[0] — Capture input for Timer 0, channel 0.
P1[0] to P1[31]
I/O
Port 1: Port 1 is a 32-bit bidirectional I/O port with individual
direction controls for each bit. The operation of port 1 pins
depends upon the pin function selected via the Pin Connect
Block.
Pins 2 through 15 of port 1 are not available.
P1[0]/CS0
G11[7]
O
CS0 — LOW-active Chip Select 0 signal.
(Bank 0 addresses range 0x8000 0000 to 0x80FF FFFF)
P1[1]/OE
G13[7]
O
OE — LOW-active Output Enable signal.
P1[16]/
TRACEPKT0
O
TRACEPKT0 — Trace Packet, bit 0. Standard I/O port with
internal pull-up.
P1[17]/
TRACEPKT1
H4[7]
O
TRACEPKT1 — Trace Packet, bit 1. Standard I/O port with
internal pull-up.
P1[18]/
TRACEPKT2
O
TRACEPKT2 — Trace Packet, bit 2. Standard I/O port with
internal pull-up.
P1[19]/
TRACEPKT3
D2[7]
O
TRACEPKT3 — Trace Packet, bit 3. Standard I/O port with
internal pull-up.
P1[20]/
TRACESYNC
102[7]
O
TRACESYNC — Trace Synchronization. Standard I/O port
with internal pull-up.
Note: LOW on this pin while RESET is LOW, enables pins
P1[25:16] to operate as Trace port after reset.
P1[21]/
PIPESTAT0
F11[7]
O
PIPESTAT0 — Pipeline Status, bit 0. Standard I/O port with
internal pull-up.
P1[22]/
PIPESTAT1
O
PIPESTAT1 — Pipeline Status, bit 1. Standard I/O port with
internal pull-up.
P1[23]/
PIPESTAT2
O
PIPESTAT2 — Pipeline Status, bit 2. Standard I/O port with
internal pull-up.
P1[24]/
TRACECLK
L11[7]
O
TRACECLK — Trace Clock. Standard I/O port with internal
pull-up.
Table 4.
Pin description …continued
Symbol
Pin (LQFP)
Pin
(TFBGA)[1]
Type
Description
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