参数资料
型号: LPC2294JBD144,551
厂商: NXP Semiconductors
文件页数: 7/54页
文件大小: 0K
描述: IC ARM7 MCU FLASH 256K 144-LQFP
标准包装: 60
系列: LPC2200
核心处理器: ARM7
芯体尺寸: 16/32-位
速度: 60MHz
连通性: CAN,EBI/EMI,I²C,Microwire,SPI,SSI,SSP,UART/USART
外围设备: POR,PWM,WDT
输入/输出数: 112
程序存储器容量: 256KB(256K x 8)
程序存储器类型: 闪存
RAM 容量: 16K x 8
电压 - 电源 (Vcc/Vdd): 1.65 V ~ 3.6 V
数据转换器: A/D 8x10b
振荡器型: 内部
工作温度: -40°C ~ 105°C
封装/外壳: 144-LQFP
包装: 托盘
配用: OM10091-ND - KIT DEV PHYCORE-ARM7/LPC2220
568-1757-ND - BOARD EVAL FOR LPC220X ARM MCU
其它名称: 568-1898
935275728551
LPC2294JBD144-S
LPC2292_2294
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 8 — 8 June 2011
15 of 54
NXP Semiconductors
LPC2292/2294
16/32-bit ARM microcontrollers with external memory interface
6.
Functional description
6.1 Architectural overview
The ARM7TDMI-S is a general purpose 32-bit microprocessor, which offers high
performance and very low power consumption. The ARM architecture is based on RISC
principles, and the instruction set and related decode mechanism are much simpler than
those of microprogrammed CISC. This simplicity results in a high instruction throughput
and impressive real-time interrupt response from a small and cost-effective processor
core.
Pipeline techniques are employed so that all parts of the processing and memory systems
can operate continuously. Typically, while one instruction is being executed, its successor
is being decoded, and a third instruction is being fetched from memory.
The ARM7TDMI-S processor also employs a unique architectural strategy known as
Thumb, which makes it ideally suited to high-volume applications with memory
restrictions, or applications where code density is an issue.
The key idea behind Thumb is that of a super-reduced instruction set. Essentially, the
ARM7TDMI-S processor has two instruction sets:
The standard 32-bit ARM set
A 16-bit Thumb set
The Thumb set’s 16-bit instruction length allows it to approach twice the density of
standard ARM code while retaining most of the ARM’s performance advantage over a
traditional 16-bit processor using 16-bit registers. This is possible because Thumb code
operates on the same 32-bit register set as ARM code.
Thumb code is able to provide up to 65 % of the code size of ARM, and 160 % of the
performance of an equivalent ARM processor connected to a 16-bit memory system.
6.2 On-chip flash program memory
The LPC2292/2294 incorporate a 256 kB flash memory system respectively. This memory
may be used for both code and data storage. Programming of the flash memory may be
accomplished in several ways. It may be programmed In System via the serial port. The
application program may also erase and/or program the flash while the application is
running, allowing a great degree of flexibility for data storage field firmware upgrades, etc.
When the on-chip bootloader is used, 248 kB of flash memory is available for user code.
The LPC2292/2294 flash memory provides a minimum of 100000 erase/write cycles and
20 years of data retention.
On-chip bootloader (as of revision 1.64) provides Code Read Protection (CRP) for the
LPC2292/2294 on-chip flash memory. When the CRP is enabled, the JTAG debug port,
external memory boot and ISP commands accessing either the on-chip RAM or flash
memory are disabled. However, the ISP flash erase command can be executed at any
time (no matter whether the CRP is on or off). Removal of CRP is achieved by erasure of
full on-chip user flash. With the CRP off, full access to the chip via the JTAG and/or ISP is
restored.
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