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参数资料
| 型号： | LT1737IS#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 11/28页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR FLYBK ISO CM 16SOIC |
| 标准包装： | 2,500 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 125kHz |
| 占空比： | 90% |
| 电源电压： | 4.1 V ~ 20 V |
| 降压： | 无 |
| 升压： | 无 |
| 回扫： | 是 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
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LT1737
OPERATIO
I IN = ?
? ? I OUT
R OUT = ESR ? ? where
K 1 = ?
? V IN ? Eff ?
R OUT = ESR ? ?
(
)
? V OUT OUT ? SENSE ? ? ( R 1 || R 2 ) or
? R ?
transformer secondary and output capacitor. This has
been represented previously by the expression “I SEC ?
ESR.” However, it is generally more useful to convert this
expression to an effective output impedance. Because the
secondary current only flows during the off portion of the
duty cycle, the effective output impedance equals the
lumped secondary impedance times the inverse of the OFF
duty cycle. That is:
? 1 ?
? DC OFF ?
R OUT = effective supply output impedance
ESR = lumped secondary impedance
DC OFF = OFF duty cycle
Expressing this in terms of the ON duty cycle, remember-
ing DC OFF = 1 – DC,
? 1 ?
? 1 – DC ?
DC = ON duty cycle
In less critical applications, or if output load current
? V OUT ?
? V IN ? Eff ?
combining the efficiency and voltage terms in a single
variable:
I IN = K1 ? I OUT , where
? V OUT ?
?
Switch current is converted to voltage by the external
sense resistor and averaged/lowpass filtered by R3 and
the external capacitor on R CMPC . This voltage is then
impressed across the external R OCMP resistor by op amp
A1 and transistor Q3. This produces a current at the
collector of Q3 which is then mirrored around and then
subtracted from the FB node. This action effectively in-
creases the voltage required at the top of the R1/R2
feedback divider to achieve equilibrium. So the effective
change in V OUT target is:
= K 1 ? ? I
? R OCMP ?
= K 1 ? SENSE ? ? ( R 1 || R 2 )
remains relatively constant, this output impedance error
may be judged acceptable and the external FB resistor
divider adjusted to compensate for nominal expected
? V OUT
? I OUT
? R ?
? R OCMP ?
R OUT = K 1 ? SENSE ? ? ( R 1 || R 2 ) and
R OCMP = K 1 ? SENSE ? ? ( R 1 || R 2 ) where
error.Inmoredemandingapplications,outputimpedance
error may be minimized by the use of the load compensa-
tion function.
To implement the load compensation function, a voltage is
developed that is proportional to average output switch
current. This voltage is then impressed across the external
R OCMP resistor, and the resulting current acts to decrease
the voltage at the FB pin. As output loading increases,
average switch current increases to maintain rough output
voltage regulation. This causes an increase in R OCMP
resistor current which effects a corresponding increase in
flyback voltage amplitude.
Assuming a relatively fixed power supply efficiency, Eff,
Power Out = Eff ? Power In
V OUT ? I OUT = Eff ? V IN ? I IN
Average primary side current may be expressed in terms
of output current as follows:
Nominal output impedance cancellation is obtained by
equating this expression with R OUT :
? R ?
? R OCMP ?
? R ?
? R OUT ?
K1 = dimensionless variable related to V IN , V OUT and
efficiency as above
R SENSE = external sense resistor
R OUT = uncompensated output impedance
(R1||R2) = impedance of R1 and R2 in parallel
The practical aspects of applying this equation to deter-
mine an appropriate value for the R OCMP resistor are found
in the Applications Information section.
1737fa
11
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