参数资料
型号: LT1737IS#TRPBF
厂商: Linear Technology
文件页数: 14/28页
文件大小: 0K
描述: IC REG CTRLR FLYBK ISO CM 16SOIC
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 125kHz
占空比: 90%
电源电压: 4.1 V ~ 20 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
LT1737
APPLICATIO S I FOR ATIO
SELECTING OSCILLATOR CAPACITOR VALUE
The switching frequency of the LT1737 is set by an
external capacitor connected between the OSCAP pin and
ground. Recommended values are between 200pF and
33pF, yielding switching frequencies between 50kHz and
250kHz. Figure 2 shows the nominal relationship between
external capacitance and switching frequency. To mini-
mize stray capacitance and potential noise pickup, this
1000
500
capacitor should be placed as close as possible to the IC
and the OSCAP node length/area minimized.
100
20
100
250
R T (k ? )
300
100
1737 F03
Figure 3. “One Shot” Times vs Programming Resistor
indicative of actual current level in the transformer pri-
mary, and may cause irregular current mode switching
action, especially at light load.
However, the user must remember that the LT1737 does
not “skip cycles” at light loads. Therefore, minimum on
time will set a limit on minimum delivered power and con-
50
30
100
200
sequently a minimum load requirement to maintain regu-
C OSCAP (pF)
1737 F02
Figure 2. f OSC vs OSCAP Value
SELECTING TIMING RESISTOR VALUES
There are three internal “one-shot” times that are pro-
grammed by external application resistors: minimum on
time, enable delay time and minimum enable time. These
are all part of the isolated flyback control technique, and
their functions have been previously outlined in the Opera-
tion section. Figure 3 shows nominal observed time ver-
sus external resistor value for these functions.
The following information should help in selecting and/or
optimizing these timing values.
Minimum On Time
This time defines a period whereby the normal switch
current limit is ignored. This feature provides immunity to
the leading edge current spike often seen at the source
node of the external power MOSFET, due to rapid charging
of its gate/source capacitance. This current spike is not
lation (see Minimum Load Considerations). Similarly,
minimum on time has a direct effect on short-circuit be-
havior (see Maximum Load/Short-Circuit Considerations).
The user is normally tempted to set the minimum on time
to be short to minimize these load related consequences.
(After all, a smaller minimum on time approaches the ideal
case of zero, or no minimum.) However, a longer time may
be required in certain applications based on MOSFET
switching current spike considerations.
Enable Delay Time
This function provides a programmed delay between
turnoff of the gate drive node and the subsequent enabling
of the feedback amplifier. At high loads, a primary side
voltage spike after MOSFET turnoff may be observed due
to transformer leakage inductance. This spike is not in-
dicative of actual output voltage (see Figure 4B). Delaying
the enabling of the feedback amplifier allows this system
to effectively ignore most or all of the voltage spike and
maintain proper output voltage regulation. The enable
delay time should therefore be set to the maximum ex-
pected duration of the leakage spike. This may have
1737fa
14
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