参数资料
型号: LT1737IS#TRPBF
厂商: Linear Technology
文件页数: 15/28页
文件大小: 0K
描述: IC REG CTRLR FLYBK ISO CM 16SOIC
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 125kHz
占空比: 90%
电源电压: 4.1 V ~ 20 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
LT1737
APPLICATIO S I FOR ATIO
implications regarding output voltage regulation at mini-
Average “start-up” V C current =
mum load (see Minimum Load Considerations).
A second benefit of the enable delay time function occurs
at light load. Under such conditions the amount of energy
Minimum Enable Time
Switching Frequency
? I SRC
stored in the transformer is small. The flyback waveform
becomes “lazy” and some time elapses before it indicates
the actual secondary output voltage (see Figure 4C). So
the enable delay time should also be set long enough to
ignore the “irrelevant” portion of the flyback waveform at
light load.
Additionally, there are cases wherein the gate output is
called upon to drive a large geometry MOSFET such that
the turnoff transition is slowed significantly. Under such
circumstances, the enable delay time may be increased to
accommodate for the lengthy transition.
MOSFET GATE DRIVE
Minimum enable time can also have implications at light
load (see Minimum Load Considerations). The temptation
is to set the minimum enable time to be fairly short, as this
is the least restrictive in terms of minimum load behavior.
However, to provide a “reliable” minimum start-up current
of say, nominally 1 μ A, the user should set the minimum
enable time at no less that 2% of the switching period
(= 1/switching frequency).
CURRENT SENSE RESISTOR CONSIDERATIONS
The external current sense resistor allows the user to
optimize the current limit behavior for the particular appli-
cation under consideration. As the current sense resistor
is varied from several ohms down to tens of milliohms,
peak switch current goes from a fraction of an ampere to
tens of amperes. Care must be taken to ensure proper
A
B
C
ENABLE
DELAY
TIME
NEEDED
ENABLE DELAY
TIME NEEDED
DISCONTINUOUS
MODE
RINGING
Figure 4
IDEALIZED FLYBACK
WAVEFORM
FLYBACK WAVEFORM
WITH LARGE LEAKAGE
SPIKE AT HEAVY LOAD
“SLOW” FLYBACK
WAVEFORM AT
LIGHT LOAD
1737 F04
circuit operation, especially with small current sense
resistor values.
For example, a peak switch current of 10A requires a
sense resistor of 0.025 ? . Note that the instantaneous
peak power in the sense resistor is 2.5W, and it must be
rated accordingly. The LT1737 has only a single sense line
to this resistor. Therefore, any parasitic resistance in the
ground side connection of the sense resistor will increase
its apparent value. In the case of a 0.025 ? sense resistor,
one milliohm of parasitic resistance will cause a 4%
reduction in peak switch current. So resistance of printed
circuit copper traces and vias cannot necessarily be
ignored.
An additional consideration is parasitic inductance. In-
ductance in series with the current sense resistor will
accentuate the high frequency components of the current
waveform. In particular, the gate switching spike and
Minimum Enable Time
This function sets a minimum duration for the expected
flyback pulse. Its primary purpose is to provide a mini-
mum source current at the V C node to avoid start-up
problems.
multimegahertz ringing at the MOSFET can be
considerably amplified. If severe enough, this can cause
erratic operation. For example, assume 3nH of parasitic
inductance (equivalent to about 0.1 inch of wire in free
space) is in series with an ideal 0.025 ? sense resistor.
A “zero” will be formed at f = R/(2 π L), or 1.3MHz. Above
1737fa
15
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