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| 型号： | LT3510EFE#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 19/30页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 2A DL 20TSSOP |
| 标准包装： | 74 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 0.8 V ~ 23.8 V |
| 输入电压： | 3.1 V ~ 25 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 250kHz ~ 1.5MHz |
| 电流 - 输出： | 2A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-TSSOP（0.173"，4.40mm 宽）裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 20-TSSOP-EP |
| 产品目录页面： | 1332 (CN2011-ZH PDF) |
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LT3510
APPLICATIONS INFORMATION
LT3510
CURRENT MODE
POWER STAGE
g m = 2.2mho
SW
OUTPUT
g m = 275μmho
R1
C PL
ESR
V C
FB
C1
C1
R C
C C
C F
3.6M
ERROR
AMP
+
0.8V
R2
TANTALUM
OR
POLYMER
CERAMIC
3510 F06
Figure 6. Model for Loop Response
the output capacitor integrates this current, and that the
capacitor on the V C pin (C C ) integrates the error ampli-
?er output current, resulting in two poles in the loop. In
V OUT1
LT3510
V CC
SYNCHRONIZATION
CIRCUITRY
most cases a zero is required and comes from either the
output capacitor ESR or from a resistor in series with C C .
PG1
R T /SYNC
CLK
3510 F07
This simple model works well as long as the value of the
inductor is not too high and the loop crossover frequency
is much lower than the switching frequency. A phase lead
capacitor (C PL ) across the feedback divider may improve
the transient response.
Synchronization
The R T /SYNC pin can be used to synchronize the regulators
to an external clock source. Driving the R T /SYNC resistor
with a clock source triggers the synchronization detection
circuitry. Once synchronization is detected, the rising edge
of SW1 will be synchronized to the rising edge of the
R T /SYNC pin signal. An AGC loop will adjust the internal
oscillators to maintain a 180 degree phase between SW1
and SW2, and also adjust slope compensation to avoid
subharmonic oscillation.
The synchronizing clock signal input to the LT3510 must
have a frequency between 250kHz and 1.5MHz, a duty
cycle between 20% and 80%, a low state below 0.5V and
a high state above 1.6V. Synchronization signals outside
of these parameters will cause erratic switching behavior.
The R T /SYNC resistor should be set such that the free
running frequency ((V RT/SYNC – V SYNCLO )/R RT/SYNC ) is
approximately equal to the synchronization frequency. If
the synchronization signal is halted, the synchronization
detection circuitry will timeout in typically 10μs at which
Figure 7. Synchronous Signal Powered from Regulator’s Output
time the LT3510 reverts to the free-running frequency
based on the current through R T /SYNC. If the R T /SYNC
resistor is held above 2V at any time, switching will be
disabled.
If the synchronization signal is not present during regula-
tor start-up (for example, the synchronization circuitry is
powered from the regulator output) the R T /SYNC pin must
see an equivalent resistance to ground between 15.4k and
133k until the synchronization circuitry is active for proper
start-up operation.
If the synchronization signal powers up in an undetermined
state (V OL , V OH , Hi-Z), connect the synchronization clock
to the LT3510 as shown in Figure 7. The circuit as shown
will isolate the synchronization signal when the output
voltage is below 90% of the regulated output. The LT3510
will start-up with a switching frequency determined by the
resistor from the R T /SYNC pin to ground.
If the synchronization signal powers up in a low impedance
state (V OL ), connect a resistor between the R T /SYNC pin
and the synchronizing clock. The equivalent resistance
seen from the R T /SYNC pin to ground will set the start-up
frequency.
3510fe
19
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| LT3510IFE#PBF | 功能描述:IC REG BUCK ADJ 2A DL 20TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 产品培训模块:MIC23xxx HyperLight Load™ Regulators 标准包装:5,000 系列:HyperLight Load® 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.8V 输入电压:2.7 V ~ 5.5 V PWM 型:混合物 频率 - 开关:4MHz 电流 - 输出:2A 同步整流器:是 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:8-VFDFN 裸露焊盘，8-MLF? 包装:带卷 (TR) 供应商设备封装:8-MLF?（2x2） 产品目录页面:1094 (CN2011-ZH PDF) 其它名称:576-3303-2 |
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