参数资料
型号: LT3837EFE#TRPBF
厂商: Linear Technology
文件页数: 12/28页
文件大小: 0K
描述: IC REG CTRLR FLYBK ISO 16-TSSOP
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 250kHz
占空比: 88%
电源电压: 4.5 V ~ 20 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-TSSOP(0.173",4.40mm)裸露焊盘
包装: 带卷 (TR)
LT3837
OPERATION
V FLBK
T1
Average primary side current is expressed in terms of
output current as follows:
V OUT
V IN ? Eff
? V OUT = K1 ? ? I OUT ?
? R1 ? N SF
R1
R2
FB
8
LOAD
COMP I
Q3
Q1 Q2
A1
V FB
+
R CMPF
50k
V IN
SENSE +
12
?
?
MP
?
I IN = K1 ? I OUT
where:
K1 =
So the effective change in V OUT target is:
R SENSE
R CMP
= K1 ? SENSE ? R1 ? N SF
14 R CMP
13 C CMP
R SENSE
3837 F01
thus:
? V OUT
? I OUT
R
R CMP
? R1 ? N SF =
R SENSE ESR + R DS(ON)
R SENSE ? ( 1–DC )
ESR + R DS(ON)
Figure1.LoadCompensationDiagram
Figure 1 shows the block diagram of the load compensa-
tion function. Switch current is converted to voltage by the
external sense resistor, averaged and lowpass filtered by
the internal 50k resistor R CMPF and the external capacitor
on C CMP . This voltage is then impressed across the exter-
nal R CMP resistor by op amp A1 and transistor Q3. This
produces a current at the collector of Q3 that is subtracted
from the FB node. This action effectively increases the
voltage required at the top of the R1/R2 feedback divider
to achieve equilibrium.
The average primary side switch current increases to
maintain output voltage regulation as output loading
increases. The increase in average current increases
the R CMP resistor current which affects a corresponding
increase in sensed output voltage, compensating for the
IR drops.
where:
K1 = dimensionless variable related to V IN , V OUT and
efficiency as explained above
R SENSE = external sense resistor
Nominal output impedance cancellation is obtained by
equating this expression with R S(OUT) :
K1 ?
R CMP 1–DC
Solving for R CMP gives:
R CMP = K1 ? ? R1 ? N SF
The practical aspects of applying this equation to determine
an appropriate value for the R CMP resistor are found in the
Applications Information section.
Assuming a relatively fixed power supply efficiency, Eff,
power balance gives:
P OUT = Eff ? P IN
V OUT ? I OUT = Eff ? V IN ? I IN
3837fd
12
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