参数资料
型号: LT3837EFE#TRPBF
厂商: Linear Technology
文件页数: 19/28页
文件大小: 0K
描述: IC REG CTRLR FLYBK ISO 16-TSSOP
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 250kHz
占空比: 88%
电源电压: 4.5 V ~ 20 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-TSSOP(0.173",4.40mm)裸露焊盘
包装: 带卷 (TR)
LT3837
APPLICATIONS INFORMATION
R A =
droppingthevoltageonUVLO.Inthismanner,hysteresis
is produced.
Referring to Figure 4, the voltage hysteresis at V IN is
equal to the change in bias current times R A . The design
procedure is to select the desired V IN referred voltage
hysteresis, V UVHYS . Then:
V UVHYS
I UVLO
where:
I UVLO = I UVLOL – I UVLOH is approximately 3.4μA
R B is then selected with the desired turn-on voltage:
Control Loop Compensation
Loop frequency compensation is performed by connect-
ing a capacitor network from the output of the feedback
amplifier (V C pin) to ground as shown in Figure 5. Be-
cause of the sampling behavior of the feedback amplifier,
compensation is different from traditional current mode
switcher controllers. Normally only C VC is required. R VC
can be used to add a “zero” but the phase margin improve-
ment traditionally offered by this extra resistor is usually
already accomplished by the nonzero secondary circuit
impedance. C VC2 can be used to add an additional high
frequency pole and is usually sized at 0.1 times C VC .
V C
– 1 ?
R B =
R A
? V IN(ON)
?
? V UVLO
?
?
9
C VC2
3825 F05
R VC
C VC
R A =
= 88.2k, use 86.6k
R B =
= 14.99k, use 15k
– 1 ?
If we wanted a V IN -referred trip point of 8.4V, with 0.3V
of hysteresis (on at 8.4V, off at 8.1V):
0.3V
3.4μA
86.6k
? 8.4V ?
?
? 1.24V ?
Even with good board layout, board noise may cause
problems with UVLO. You can filter the divider but keep
large capacitance off the UVLO node because it will slow
the hysteresis produced from the change in bias current.
Figure 4c shows an alternate method of filtering by split-
ting the R A resistor with the capacitor. The split should
put more of the resistance on the UVLO side.
Figure 5. V C Compensation Network
In further contrast to traditional current mode switchers,
V C pin ripple is generally not an issue with the LT3837.
The dynamic nature of the clamped feedback amplifier
forms an effective track/hold type response, whereby the
V C voltage changes during the flyback pulse, but is then
held during the subsequent switch-on portion of the next
cycle. This action naturally holds the V C voltage stable
during the current comparator sense action (current mode
switching).
AN19 provides a method for empirically tweaking frequency
compensation. Basically, it involves introducing a load
current step and monitoring the response.
Slope Compensation
R B
R B
I UVLO
V IN
R A
UVLO
LT3837
(4a) UV Turning ON
I UVLO
V IN
R A
UVLO
LT3837
(4b) UV Turning OFF
V IN
R A1
R A2
C UVLO UVLO
R B
3837 F04
(4c) UV Filtering
This part incorporates current slope compensation. Slope
compensation is required to ensure current loop stability
when the DC is greater than 50%. In some switcher con-
trollers, slope compensation reduces the maximum peak
current at higher duty cycles. The LT3837 eliminates this
need by having circuitry that compensates for the slope
compensation so that maximum current sense voltage is
constant across all duty cycles.
Figure 4
3837fd
19
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