参数资料
型号: LT3837EFE#TRPBF
厂商: Linear Technology
文件页数: 15/28页
文件大小: 0K
描述: IC REG CTRLR FLYBK ISO 16-TSSOP
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 250kHz
占空比: 88%
电源电压: 4.5 V ~ 20 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-TSSOP(0.173",4.40mm)裸露焊盘
包装: 带卷 (TR)
LT3837
APPLICATIONS INFORMATION
tight coupling usually increases primary-to-secondary
capacitance and limits the primary-to-secondary break-
down voltage, so it isn’t always practical.
Primary Inductance
The transformer primary inductance, L P , is selected based
on the peak-to-peak ripple current ratio (X) in the trans-
former relative to its maximum value. As a general rule,
keep X in the range of 50% to 70% ripple current (i.e., X =
0.5 to 0.7). Higher values of ripple will increase conduction
losses, while lower values will require larger cores.
Ripple current and percentage ripple is largest at minimum
duty cycle; in other words, at the highest input voltage.
L P is calculated from:
L P = ( V IN(MAX) ? DC MIN ) 2 = ( V IN(MAX) ? DC MIN ) 2 ? Eff
f OSC ? X MAX ? P IN f OSC ? X MAX ? P OUT
Transformer Core Selection
Once L P is known, the type of transformer is selected.
High efficiency converters use ferrite cores to minimize
core loss. Actual core loss is independent of core size for
a fixed inductance, but decreases as inductance increases.
Since increased inductance is accomplished through
more turns of wire, copper losses increase. Thus trans-
former design balances core and copper losses. Remem-
ber that increased winding resistance will degrade cross
regulation and increase the amount of load compensa-
tion required.
The main design goals for core selection are reducing
copper losses and preventing saturation. Ferrite core mate-
rial saturates hard, rapidly reducing inductance when the
peak design current is exceeded. This results in an abrupt
increase in inductor ripple current and, consequently, out-
put voltage ripple. Do not allow the core to saturate! The
maximum peak primary current occurs at minimum V IN :
? ? 1 + MIN ?
where:
f OSC is the OSC frequency
I PK =
P IN ? X ?
V IN(MIN) ? DC MAX ? 2 ?
P IN =
= 37.5W
DC MIN =
=
= 35.5%
N ? V IN(MAX) 1 18
1 + 1 + ?
V OUT
( 18V ? 0.355 ) 2
L P = = 7.8 μ H
DC MAX =
=
= 52.4%
N ? V IN(MIN) 1 9
1 + 1 + ?
V OUT
X MIN = ( V IN(MIN) ? DC MAX ) 2 = ( 9 ? 0.52 ) 2
I PK =
? ? 1 +
? = 9.47A
DC MIN istheDCatmaximuminputvoltage
X MAX is ripple current ratio at maximum input voltage
Continuing with the 9V to 3.3V example, let us assume a
10A output, 9V to 18V input power with 88% efficiency.
Using X = 0.7, and f OSC = 200kHz:
3.3 ? 10A
88%
1 1
3 3.3
200kHz ? 0.7 ? 37.5W
Optimization might show that a more efficient solution
is obtained at higher peak current but lower inductance
and the associated winding series resistance. A simple
spreadsheet program is useful for looking at tradeoffs.
now :
1 1
3 3.3
f OSC ? L P ? P IN 200kHz ? 7.8 μ H ? 37.5W
= 0.380
Using the example numbers leads to:
37.5W ? 0.380 ?
9V ? 0.524 ? 2 ?
Multiple Outputs
One advantage that the flyback topology offers is that ad-
ditional output voltages can be obtained simply by adding
windings. Designing a transformer for such a situation is
beyond the scope of this document. For multiple windings,
realize that the flyback winding signal is a combination of
activity on all the secondary windings. Thus load regulation
is affected by each windings load. Take care to minimize
cross regulation effects.
3837fd
15
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