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参数资料
| 型号： | LTC1149CS-5#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 8/20页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 16-SOIC |
| 标准包装： | 50 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 250kHz |
| 占空比： | 100% |
| 电源电压： | 最高 48V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 包装： | 管件 |
LTC1149
LTC1149-3.3/LTC1149-5
)
APPLICATIO S I FOR ATIO
The LTC1149 series automatically extends t OFF during a
short circuit to allow sufficient time for the inductor
current to decay between switch cycles. The resulting
f=
1
t OFF
1–
V OUT
V IN
)
ripple current causes the average short-circuit current
where:
) )
I SC(AVG) to be reduced to approximately I MAX .
0.20
t OFF = (1.3)(10 4 )(C T )
V REG
V OUT
0.18
0.16
0.14
0.12
V REG is the desired output voltage (i.e., 5V, 3.3V), while
V OUT is the actual output voltage. Thus V REG /V OUT = 1
when in regulation.
0.10
0.08
0.06
0.04
0.02
0
0
1 2 3 4
MAXIMUM OUTPUT CURRENT (A)
5
Note that as V IN decreases, the frequency decreases.
When the input to output voltage differential drops below
1.5V, the LTC1149 series reduces t OFF by increasing the
discharge current in C T . This prevents audible operation
prior to dropout.
Once the frequency has been set by C T , the inductor L must
1149 F02
Figure 2. R SENSE vs Maximum Output Current
L and C T Selection for Operating Frequency
The LTC1149 series uses a constant off-time architecture
with t OFF determined by an external timing capacitor C T .
Each time the P-channel MOSFET switch turns on, the
voltage on C T is reset to approximately 3.3V. During the
off-time, C T is discharged by a current which is propor-
tional to V OUT . The voltage on C T is analogous to the
current in inductor L, which likewise decays at a rate
proportional to V OUT . Thus the inductor value must track
be chosen to provide no more than 25mV/R SENSE of peak-
to-peak inductor ripple current. This results in a minimum
required inductor value of:
L MIN =( 5.1)(10 5 )(R SENSE )(C T ) ( V REG )
As the inductor value is increased from the minimum
value, the ESR requirements for the output capacitor are
eased at the expense of efficiency. If too small an inductor
is used, the inductor current will decrease past zero and
change polarity. A consequence of this is that the LTC1149
series may not enter Burst Mode operation and efficiency
will be severely degraded at low currents.
the timing capacitor value.
The value of C T is calculated from the desired continuous
mode operating frequency, f:
1400
1200
1000
V OUT = 5V
)
C T = (7.8)(10 ) 1 –
f
–5
V OUT
V IN
)
800
600
V IN = 48V
A graph for selecting C T versus frequency including the
effects of input voltage is given in Figure 3.
400
200
V IN = 24V
V IN = 12V
As the operating frequency is increased the gate charge
0
0
50
100
150
200
250
losses will be higher, reducing efficiency (see Efficiency
Considerations). The complete expression for operating
frequency is given by:
8
FREQUENCY (kHz)
1149 F03
Figure 3. Timing Capacitor Selection
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| LTC1149CSPBF | 制造商:Linear Technology 功能描述:DC-DC Controller Step-Down 48V SOIC16 |
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