参数资料
型号: LTC3728IUH#PBF
厂商: Linear Technology
文件页数: 16/36页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 32-QFN
标准包装: 73
系列: PolyPhase®
PWM 型: 电流模式
输出数: 2
频率 - 最大: 590kHz
占空比: 99%
电源电压: 3.5 V ~ 36 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 32-WFQFN 裸露焊盘
包装: 管件
LTC3728
APPLICATIONS INFORMATION
load transient response and suf?cient ripple current sig-
nal in the current loop. The maximum ΔI L occurs at the
maximum input voltage.
The inductor value also has secondary effects. The tran-
sition to Burst Mode operation begins when the average
inductor current required results in a peak current below
25% of the current limit determined by R SENSE . Lower
inductor values (higher ΔI L ) will cause this to occur at
lower load currents, which can cause a dip in ef?ciency in
the upper range of low current operation. In Burst Mode
operation, lower inductance values will cause the burst
frequency to decrease.
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High ef?ciency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite, molypermalloy,
or Kool Mμ ? cores. Actual core loss is independent of core
size for a ?xed inductor value, but it is very dependent
Power MOSFET and D1 Selection
Two external power MOSFETs must be selected for each
controller in the LTC3728: One N-channel MOSFET for
the top (main) switch, and one N-channel MOSFET for
the bottom (synchronous) switch.
The peak-to-peak drive levels are set by the INTV CC
voltage. This voltage is typically 5V during start-up
(see EXTV CC Pin Connection). Consequently, logic-level
threshold MOSFETs must be used in most applications.
The only exception is if low input voltage is expected
(V IN < 5V); then, sublogic level threshold MOSFETs (V GS(TH)
< 3V) should be used. Pay close attention to the BV DSS
speci?cation for the MOSFETs as well; most of the logic
level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the
on-resistance R DS(ON) , reverse-transfer capacitance C RSS ,
input voltage and maximum output current. When the
LTC3728 is operating in continuous mode the duty cycles
for the top and bottom MOSFETs are given by:
on inductance selected. As inductance increases, core
losses go down. Unfortunately, increased inductance
requires more turns of wire and therefore copper losses
Main Switch Duty Cycle =
V OUT
V IN
will increase.
Ferrite designs have very low core loss and are preferred
Synchronous Switch Duty Cycle =
V IN – V OUT
V IN
( I MAX ) 2 ( 1 +
) R DS(ON) +
P MAIN =
k ( V IN ) ( I MAX ) ( C RSS ) ( f )
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates hard, which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Molypermalloy (from Magnetics, Inc.) is a very good, low
The MOSFET power dissipations at maximum output
current are given by:
V OUT
V IN
2
loss core material for toroids, but it is more expensive
than ferrite. A reasonable compromise from the same
manufacturer is Kool Mμ. Toroids are very space ef?cient,
P SYNC =
V IN – V OUT
V IN
( I MAX ) 2 ( 1 +
) R DS(ON)
especially when you can use several layers of wire. Because
they generally lack a bobbin, mounting is more dif?cult.
However, designs for surface mount are available that do
not increase the height signi?cantly.
where δ is the temperature dependency of R DS(ON) and k
is a constant inversely related to the gate drive current.
Both MOSFETs have I 2 R losses while the topside N-channel
equation includes an additional term for transition losses,
3728fg
16
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