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参数资料
| 型号： | LTC3734EUH#TR |
| 厂商： | Linear Technology |
| 文件页数： | 13/28页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR DC/DC 1PH HI EFF 32QFN |
| 标准包装： | 2,500 |
| 应用： | 控制器，Intel 移动式 CPU |
| 输入电压： | 4 V ~ 30 V |
| 输出数： | 1 |
| 输出电压： | 0.7 V ~ 1.71 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-WFQFN 裸露焊盘 |
| 供应商设备封装： | 32-QFN 裸露焊盘（5x5） |
| 包装： | 带卷 (TR) |
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LTC3734
APPLICATIONS INFORMATION
V OUT
V IN – V OUT
? ( I OUT ) ? ( 1 + δ ? ? T ) ? R DS(ON) (3)
P CONTOP =
? ( I OUT ) ? ( 1 + δ ? ? T )
P CONBOT =
V IN – V OUT 2
InductorCoreSelection
Once the value for L1 is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite, molypermalloy,
or Kool Mμ cores. Actual core loss is independent of core
size for a fixed inductor value, but it is very dependent
on inductor type selected. As inductance increases, core
losses go down. Unfortunately, increased inductance
requires more turns of wire and therefore copper losses
will increase.
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
A variety of inductors designed for high current, low volt-
age applications are available from manufacturers such
as Sumida, Coilcraft, Coiltronics, Toko and Panasonic.
Power MOSFET, D1 Selection
External power MOSFETs must be selected for output
stage with the LTC3734: one N-channel MOSFET for the
top (main) switch, and one N-channel MOSFET for the
bottom (synchronous) switch.
The peak-to-peak drive levels are set by the PV CC volt-
age. This voltage typically ranges from 4.5V to 7V. Con-
sequently, logic-level threshold MOSFETs must be used
in most applications. Pay close attention to the BV DSS
specification for the MOSFETs as well; most of the logic-
level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the “ON”
resistance R DS(ON) , gate charge Q G , reverse transfer ca-
pacitance C RSS , breakdown voltage BV DSS and maximum
continuous drain current I D(MAX) .
When the LTC3734 operates at continuous mode in a
step-down configuration, the duty cycles for the top and
bottom MOSFETs are approximately:
Top MOSFET Duty Cycle = (1)
V IN
Bottom MOSFET Duty Cycle = (2)
V IN
The conduction losses of the top and bottom MOSFETs
are therefore:
V OUT 2
V IN
(4)
V IN
? R DS(ON)
where I OUT is the maximum output current at full load, ?T
is the difference between MOSFET operating temperature
and room temperature, and δ is the temperature depen-
dency of R DS(ON) . δ is roughly 0.004/°C ~ 0.006/°C for
low voltage MOSFETs.
The power losses of driving the top and bottom MOSFETs
are simply:
P DRTOP = Q G ? PV CC ? f (5)
P DRBOT = Q G ? PV CC ? f (6)
Use Q G data at V GS = PV CC in MOSFET data sheets. f is
the switching frequency as described previously. Please
notice that the above gate driving losses are usually not
dissipated by the MOSFETs. Instead they are mainly dis-
sipated on the internal drivers of the LTC3734, if there are
no resistors connected between the drive pins (TG, BG)
and the gates of the MOSFETs.
The calculation of MOSFET switching loss is complicated
by several factors including the wide distribution of power
3734fa
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