参数资料
型号: LTC3734EUH#TR
厂商: Linear Technology
文件页数: 20/28页
文件大小: 0K
描述: IC CTRLR DC/DC 1PH HI EFF 32QFN
标准包装: 2,500
应用: 控制器,Intel 移动式 CPU
输入电压: 4 V ~ 30 V
输出数: 1
输出电压: 0.7 V ~ 1.71 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-WFQFN 裸露焊盘
供应商设备封装: 32-QFN 裸露焊盘(5x5)
包装: 带卷 (TR)
LTC3734
APPLICATIONS INFORMATION
R AVP ?
(12)
–1
where
AVP is the slope, in mV/A
R SENSE is the current sense resistor
m is the number of phases, m = 1 for LTC3734
R3 and R AVP are defined in Figure 6
g m is the transconductance gain for the error amplifier,
it is about 4.5mmho for LTC3734.
Rewriting this equation, we can estimate the R AVP value
to be:
35.5 ? R3
m ? | AVP|
R SENSE
Typically the calculation results based on these equations
have ±10% tolerance. So the resistor values need to be
fine tuned.
V OUT+
R3
R2
R1
V OA+
V OA–
R AVP
+
OAOUT
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
FB
VID
0.6V +
Figure 6. Simplified Schematic
Diagram for AVP Design in LTC3734
I TH
3735 F09
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of
the losses in LTC3734 circuits: 1) I 2 R losses, 2) Topside
MOSFET transition losses, 3) PV CC supply current and
4) C IN loss.
R AVP ?
35.5 ? R3 ? R SENSE
m ? | AVP|
R SENSE R3 R
if g m ? R3 >>
Rewritingequation(9)wecanestimatetheAVPresistor
to be:
(10)
We also adopt the current sense resistors as part of
voltage positioning slopes. So the total load line slope is
estimated to be:
AVP ? –35.5 ? ? – SENSE , (11)
m R AVP m
V OUT
0.6V
1) I 2 R losses are predicted from the DC resistances of
the fuse (if used), MOSFET, inductor, and current sense
resistor. In continuous mode the average output current
flows through L and R SENSE , but is “chopped” between the
topside MOSFET and the synchronous MOSFET. If the two
MOSFETs have approximately the same R DS(ON) , then the
resistance of one MOSFET can simply be summed with
the resistances of L, R SENSE and ESR to obtain I 2 R losses.
For example, if each R DS(ON) = 10mΩ, R L = 10mΩ, and
R SENSE = 5mΩ, then the total resistance is 25mΩ. This
results in losses ranging from 2% to 8% as the output
current increases from 3A to 15A per output stage for a 5V
output, or a 3% to 12% loss per output stage for a 3.3V
3734fa
20
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