参数资料
型号: LTC4160EUDC-1#TRPBF
厂商: Linear Technology
文件页数: 11/32页
文件大小: 0K
描述: IC SWITCH POWER MANAGER 20-QFN
标准包装: 2,500
系列: Bat-Track™, PowerPath™
功能: 电源管理
电池化学: 锂离子(Li-Ion)、锂聚合物(Li-Pol)
电源电压: 4.35 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-WFQFN 裸露焊盘
供应商设备封装: 20-QFN(3x4)
包装: 带卷 (TR)
LTC4160/LTC4160-1
PIN FUNCTIONS
V BUS (Pin 13): Power Pin. This pin delivers power to V OUT
via the SW pin by drawing controlled current from a DC
source such as a USB port or DC output wall adapter.
In On-The-Go mode this pin provides power to external
loads. Bypass V BUS with a low impedance multilayer
ceramic capacitor.
SW (Pin 14): The SW pin transfers power between V BUS
to V OUT via the bidirectional switching regulator. See
the Applications Information section for a discussion of
inductance value and current rating.
I LIM0 , I LIM1 (Pins 15, 16): I LIM0 and I LIM1 control the V BUS
input current limit of the bidirectional PowerPath switching
regulator in step-down mode. See Table 1. Each has an
internal 1.8μA pull-down current source.
CLPROG (Pin 17): USB Current Limit Program and Monitor
Pin. A 1% resistor from CLPROG to ground determines
the upper limit of the current drawn or sourced from the
V BUS pin. A precise fraction, h CLPROG , of the V BUS current
is sent to the CLPROG pin when the PMOS switch of the
bidirectional PowerPath switching regulator is on. The
switching regulator delivers power until the CLPROG pin
reaches 1.18V in step-down mode and 1.15V in step-up
mode. When the switching regulator is in step-down mode,
CLPROG is used to regulate the average input current.
Several V BUS current limit settings are available via user
input which will typically correspond to the 500mA and
100mA USB specifications. When the switching regulator
is in step-up mode (USB On-The-Go), CLPROG is used to
limit the average output current to 680mA. A multilayer
ceramic averaging capacitor or R-C network is required
at CLPROG for filtering.
LDO3V3 (Pin 18): 3.3V LDO Output Pin. This pin provides
a regulated always-on 3.3V supply voltage. LDO3V3
gets its power from V OUT . It may be used for light loads
such as a watch dog microprocessor or real time clock.
A 1μF capacitor is required from LDO3V3 to ground. If
the LDO3V3 output is not used it should be disabled by
connecting it to V OUT .
NTCBIAS (Pin 19): NTC Thermistor Bias Output. If NTC
operation is desired, connect a bias resistor between
NTCBIAS and NTC, and an NTC thermistor between NTC
and GND. To disable NTC operation, connect NTC to GND
and leave NTCBIAS open.
NTC (Pin 20): Input to the Thermistor Monitoring Circuits.
The NTC pin connects to a negative temperature coefficient
thermistor, which is typically co-packaged with the battery,
to determine if the battery is too hot or too cold to charge.
If the battery’s temperature is out of range, charging is
paused until it re-enters the valid range. A low drift bias
resistor is required from NTCBIAS to NTC and a thermistor
is required from NTC to ground. To disable NTC operation,
connect NTC to GND and leave NTCBIAS open.
GND (Exposed Pad Pin 21): Ground. The Exposed Pad
should be connected to a continuous ground plane on the
second layer of the printed circuit board by several vias
directly under the LTC4160/LTC4160-1.
41601fa
11
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