参数资料
型号: LTC4160EUDC-1#TRPBF
厂商: Linear Technology
文件页数: 27/32页
文件大小: 0K
描述: IC SWITCH POWER MANAGER 20-QFN
标准包装: 2,500
系列: Bat-Track™, PowerPath™
功能: 电源管理
电池化学: 锂离子(Li-Ion)、锂聚合物(Li-Pol)
电源电压: 4.35 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-WFQFN 裸露焊盘
供应商设备封装: 20-QFN(3x4)
包装: 带卷 (TR)
LTC4160/LTC4160-1
APPLICATIONS INFORMATION
OVP
(OPTIONAL)
LTC4160 /
LTC4160-1
ENOTG
ON-THE-GO
TRANSCEIVER
B DEVICE
OVSENS
OVGATE
V BUS
C B C A
<6.5μF <6.5μF FOR OTG DEVICES
WITHOUT OVP >96μF FOR STANDARD HOST
D –
D +
STANDARD
USB HOST OR
ON-THE-GO
POWER
MANAGER
STANDARD OR
ON-THE-GO
TRANSCEIVER
A DEVICE
41601 F12
Figure 10. LTC4160/LTC4160-1 as the B Device
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC4160/LTC4160-1:
1. The Exposed Pad of the package (Pin 21) should connect
directly to a large ground plane to minimize thermal and
electrical impedance.
41601 F11
Figure 11. Higher Frequency Ground Current Follow Their
Incident Path. Slices in the Ground Plane Create Large Loop
Areas. The Large Loop Areas Increase the Inductance of the Path
Leading to Higher System Noise.
The IDGATE pin for the external ideal diode controller has
extremely limited drive current. Care must be taken to
minimize leakage to adjacent PC board traces. 100nA of
leakage from this pin will introduce an additional offset to
the ideal diode of approximately 10mV. To minimize leakage,
the trace can be guarded on the PC board by surrounding
it with V OUT connected metal, which should generally be
less than one volt higher than IDGATE.
2. The trace connecting V BUS to its respective decoupling
capacitor should be as short as possible. The GND
side of these capacitors should connect directly to the
ground plane of the part. These capacitors provide the
AC current to the internal power MOSFETs and their
drivers. It is critical to minimize inductance from these
capacitors to the LTC4160/LTC4160-1.
3. Connections between the PowerPath switching regulator
inductor and the output capacitor on V OUT should be kept
as short as possible. Use area fills whenever possible.
The GND side of the output capacitors should connect
directly to the thermal ground plane of the part.
4. The switching power trace connecting SW to its respec-
tive inductor should be minimized to reduce radiated
EMI and parasitic coupling.
41601fa
27
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