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参数资料
| 型号： | LTC4259CGW#PBF |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | 电源管理 |
| 英文描述： | 4-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO36 |
| 封装： | 0.300 INCH, PLASTIC, SSOP-36 |
| 文件页数： | 15/32页 |
| 文件大小： | 324K |
| 代理商： | LTC4259CGW#PBF |
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LTC4259
22
4259i
the OSCIN pin is driven with either a sine wave or a
smoothed trapezoid wave, the LTC4259 is able to distin-
guish between capacitive impedance and resistive imped-
ance on the Power over Ethernet connection. The cable
capacitance has to really get out of hand (about 0.5
F,
which is an order of magnitude greater than worst case for
a long CAT-3 or CAT-5 cable) before the LTC4259 has any
trouble.
OSCIN Input and Oscillator Requirements
AC disconnect depends on an external oscillator source
applied to the OSCIN pin. The LTC4259 measures channel
impedance by applying an amplified version of the OSCIN
signal to the port’s DETECT pin (see Figure 16). The
oscillator should be well-controlled because errors in this
signal become errors in the measured channel imped-
ance. As shown in Figure 17, the load being sensed by AC
disconnect has a resistive and a large reactive compo-
nent. Current through the PD’s signature resistor de-
pends on the amplitude of the AC signal while current into
the capacitors depends on the slew rate; I = C dV/dt.
Consequently, the LTC4259 is sensitive to the amplitude
and slew rate of the OSCIN signal, but is more tolerant of
frequency and offset errors. Internal limits prevent the
LTC4259 from being adversely affected by OSCIN signals
with excessive amplitude.
There are many ways to build oscillators with controlled
amplitudes and slew rates, especially since the frequency
of the oscillator does not have to be well-controlled. An
example oscillator circuit will be provided in a later
version of this data sheet. Contact the LTC Applications
department for additional oscillator circuits.
Slew rates between 0.5V/ms and 1.2V/ms are required
with the recommended values of CDET, RDET and CPSE. The
LTC4259 will work with other slew rates if CDET, RDET and
CPSE are resized. As alluded to previously, AC disconnect
is complicated and redesigning for different component
sizes is a difficult task. Keep in mind that the IEEE 802.3af
specification places upper limits of 100V/ms on the slew
rate and 500Hz on the frequency of the AC signal at the
port. Voltage gain, AVACD, from OSCIN to DETECTn in-
creases the slew rate by the voltage gain. Since AVACD has
a maximum absolute value of 3.3V/V (
±3V typ), the slew
rate at the OSCIN pin must be less than 30V/ms.
The LTC4259’s OSCIN input amplifier will accept signals
between DGND – 0.3V and VDD + 0.5V. This amplifier has
a gain of –1 and is referenced to 1.2V above DGND. An
OSCIN voltage greater than 2.2V will cause the amplifier’s
output to clip against DGND. Clipping will not affect the
performance of AC disconnect until the clipping becomes
so severe that even the midrange (where the controlled
slew rate occurs) of the signal is clipped. Keep the midrange
or average voltage of the OSCIN signal below 1.5V to avoid
severe clipping. OSCIN signals below DGND can interact
with the ESD protection circuitry on the pin and are
therefore discouraged. Also, meeting the IEEE 802.3af
specification for maximum AC amplitude on the port just
after the PD is removed can depend on the OSCIN input
peak-to-peak amplitude. Clipping by LTC4259’s OSCIN
input circuitry will generally ensure that this specification
is met. Note that under normal operation, the AC discon-
nect output on the DETECT
n pin will have an amplitude
near 6V peak-to-peak. The combination of RDET, CDET and
CPSE attenuate the signal so half this amplitude is seen at
the port when the channel is powered and the PD has just
been removed. When the PD is still connected there will be
almost no AC amplitude on the port.
The LTC4259 monitors Pin 36 for the presence of an
oscillating signal. If no signal is present and the Osc Fail
Mask bit is set, then Osc Fail (bit 1 of the Supply Event
register) is set, triggering an interrupt. As the LTC4259’s
AC disconnect circuitry self-checks the OSCIN signal, the
Osc Fail bit is intended as a fault indicator to alert the PSE
host controller. Beyond triggering an interrupt, the Osc
Fail bit has no effect. The Osc Fail bit being clear indicates
that the OSCIN signal goes below 0.6V and above 1.8V at
least once every 250ms. It does not necessarily guarantee
that AC disconnect will function properly. However, AC
APPLICATIO S I FOR ATIO
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