参数资料
型号: LTC4259CGW#PBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 电源管理
英文描述: 4-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO36
封装: 0.300 INCH, PLASTIC, SSOP-36
文件页数: 9/32页
文件大小: 324K
代理商: LTC4259CGW#PBF
LTC4259
17
4259i
Dual-Level Current Limit
A PD is permitted to draw up to 350mA continuously and
up to 400mA for 50ms. The LTC4259 has two correspond-
ing current limit thresholds, ICUT (350mAto400mA,375mA
typ) and ILIM (400mA to 450mA, 425mA typ). These are
given by the equations:
ICUT = VCUT/RS, ILIM = VLIM/RS
RS is the sense resistor and should be 0.5 for IEEE
802.3af compliance. Two 1% 1
thick-film resistors in
parallel may be used to minimize cost. While the LTC4259
allows the port current to exceed ICUT for a limited time
period (see tICUT timing below), it does not allow the cur-
rent to exceed ILIM. The current limit circuit monitors the
port current by monitoring the voltage across the sense
resistor and reduces the MOSFET gate voltage as needed
to keep the current at or below ILIM. When the current
drops below ILIM, the gate voltage is restored to the full
value to keep the MOSFET resistance to a minimum.
tICUT Timing
Whenever more than ICUT = VCUT/RS flows through a port,
the port’s sense voltage is above VCUT and the tICUT timer
counts up. If the sense voltage is still above VCUT when the
tICUT timer expires, the LTC4259 will turn off the power to
the port immediately and set the appropriate tICUT Fault bit
in register 06h/07h. The tICUT timer duration can be pro-
grammed via register 16h, bits 3 and 2 (Table 1).
The tICUT timer is an up/down counter that is designed to
protect the external MOSFET from thermal stress caused
by operating in current limit for an extended duration. The
counter counts up whenever the current is above ICUT and
counts down at 1/16th the rate when it is not. The counter
will bottom out at zero to prevent underflow. Full count
indicates that the tICUT timer has expired and the port will
be turned off.
This count up/count down behavior creates duty cycle
protection, preventing intermittent current limit faults from
causing cumulative thermal stress in the MOSFET. If the port
enters current limit but then exits before the timer expires,
the count will decrease slowly, giving the ICUT timer a
headstart with a repeated fault unless the repeat interval is
infrequent (less than 6.3% duty cycle typ).
If the tICUT timer expires and causes the port to shut off, the
timer will continue to run, counting down at the slow
1/16th rate and preventing the port from being repowered
until the count returns to zero. This protects the MOSFET
from damage due to a faulty PD that may still have a valid
signature, or from errant software that repeatedly writes to
the Power On bit.
The port will not repower until a valid detect occurs after
the count returns to zero in auto mode or the power on bit
is written to after the count returns to zero. Writing to the
power on bit before the count returns to zero has no effect.
tSTART Timing
To distinguish between normal turn-on current limit be-
havior and current limit faults which occur after power-up
is complete, the LTC4259 starts a timer (the tSTART timer)
whenever a power-up sequence begins.
The tSTART timer serves three functions. First and fore-
most, it allows the user to specify a different current limit
timeout (tSTART instead of tICUT) during turn-on (current
limit duty cycle protection remains functional). Second,
the DC disconnect timer is disabled during this period and
can only begin counting up after the tSTART timer has
expired. Together, these two features let the PD draw the
maximum current IINRUSH to charge its input capacitance,
boot up and begin drawing the minimum load without
triggering a tSTART fault. Finally, if the device is in current
limit for the entire tSTART period, a tSTART fault will be
generated instead of a tICUT fault. This can be useful for
tracking down the cause of a current fault.
As long as the PD draws less than ICUT at the end of tSTART
and begins drawing the minimum current within tDIS after
tSTART expires (if DC disconnect is enabled) no faults will
be indicated.
The tSTART timer also implements duty cycle protection
and its duration can be programmed via register 16h, bits
5 and 4 (Table 1).
APPLICATIO S I FOR ATIO
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