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| 型号： | LTC6945IUFD#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 14/28页 |
| 文件大小： | 0K |
| 描述： | IC SYNTHESIZER INTEGER N 28QFN |
| 软件下载： | PLLWizard™ PLLWizard™, with .NET 2.0 installer |
| 标准包装： | 73 |
| 类型： | * |
| PLL： | 是 |
| 输入： | 时钟 |
| 输出： | 时钟 |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:1 |
| 差分 - 输入:输出： | 是/是 |
| 频率 - 最大： | 6GHz |
| 除法器/乘法器： | 是/无 |
| 电源电压： | 3.15 V ~ 5.25 V |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-WFQFN 裸露焊盘 |
| 供应商设备封装： | 28-QFN（4x5） |
| 包装： | 管件 |
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LTC6945
21
6945f
APPLICATIONS INFORMATION
Choosing the correct COUNTS depends upon the ratio of
the bandwidth of the loop to the PFD frequency (BW/fPFD).
Smaller ratios dictate larger COUNTS values. A COUNTS
value of 128 will work for the ratio of 1/25. From Table 4,
LKCT[1:0] = 1 for 128 counts.
Using Table 5 with the previously selected ICP of 11.2mA,
gives CP[3:0] = 11. This is enough information to program
Reg09:
Reg09 = hDB
To enable the lock indicator, write Reg07:
Reg07 = h01
Charge Pump Function Programming
The DC1649 includes an LT1678I op amp in the loop filter.
This allows the circuit to reach the voltage range speci-
fied for the VCO’s tuning input. However, it also adds an
inversion in the loop transfer function. Compensate for
this inversion by setting CPINV = 1.
This example does not use the additional voltage clamp
features to allow fault condition monitoring. The loop
feedback provided by the op amp will force the charge
pump output to be equal to the op amp positive input
pin’s voltage. Disable the charge pump voltage clamps by
setting CPCHI = 0 and CPCLO = 0. Disable all the other
charge pump functions (CPMID, CPRST, CPUP and CPDN)
to allow the loop to lock:
Reg0A = h10
The loop should now lock. Now unmute the output by
setting OMUTE = 0 (assumes the MUTE pin is high):
Reg02 = h08
REFERENCE SOURCE CONSIDERATIONS
A high quality signal must be applied to the REF± inputs as
they provide the frequency reference to the entire PLL. As
mentioned previously, to achieve the part’s in-band phase
noise performance, apply a CW signal of at least 6dBm
into 50Ω, or a square wave of at least 0.5VP-P with slew
rate of at least 40V/μs.
The LTC6945 may be driven single-ended to CMOS levels
(greater than 2.7VP-P). Apply the reference signal directly
without a DC-blocking capacitor at REF+, and bypass REF–
to GND with a 47pF capacitor. The BST bit must also be
set to “0”, according to guidelines given in Table 2.
The LTC6945 achieves an in-band normalized phase noise
floor of –226dBc/Hz (typical). To calculate its equivalent
input phase noise floor LM(IN), use Equation 10:
LM(IN) = –226 + 10 log10(fREF)
(10)
For example, using a 10MHz reference frequency gives
an input phase noise floor of –156dBc/Hz. The reference
frequency source’s phase noise must be approximately
3dB better than this to prevent limiting the overall system
performance.
IN-BAND OUTPUT PHASE NOISE
The in-band phase noise produced at fRF may be calculated
by using Equation 11.
L
M(OUT) = –226 + 10 log10 fPFD
()
+20 log
10
f
RF
f
PFD
or
L
M(OUT) = –226 + 10 log10 fPFD
()
+20 log
10
N
O
(11)
As seen for a given PFD frequency fPFD, the output in-band
phase noise increases at a 20dB-per-decade rate with the
N divider count. So, for a given output frequency fRF, fPFD
should be as large as possible (or N should be as small as
possible) while still satisfying the application’s frequency
step size requirements.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC6946-1 | 制造商:LINER 制造商全称:Linear Technology 功能描述:30MHz to 1.4GHz IQ Demodulator |
| LTC6946-2 | 制造商:LINER 制造商全称:Linear Technology 功能描述:30MHz to 1.4GHz IQ Demodulator |
| LTC6946-3 | 制造商:LINER 制造商全称:Linear Technology 功能描述:30MHz to 1.4GHz IQ Demodulator |
| LTC6946IUFD-1#PBF | 功能描述:IC INTEGER-N PLL W/VCO 28-QFN RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:2,000 系列:- 类型:PLL 频率合成器 PLL:是 输入:晶体 输出:时钟 电路数:1 比率 - 输入:输出:1:1 差分 - 输入:输出:无/无 频率 - 最大:1GHz 除法器/乘法器:是/无 电源电压:4.5 V ~ 5.5 V 工作温度:-20°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-LSSOP（0.175"，4.40mm 宽） 供应商设备封装:16-SSOP 包装:带卷 (TR) 其它名称:NJW1504V-TE1-NDNJW1504V-TE1TR |
| LTC6946IUFD-1#TRPBF | 功能描述:IC INTEGER-N PLL W/VCO 28QFN RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:Precision Edge® 类型:时钟/频率合成器 PLL:无 输入:CML，PECL 输出:CML 电路数:1 比率 - 输入:输出:2:1 差分 - 输入:输出:是/是 频率 - 最大:10.7GHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-VFQFN 裸露焊盘，16-MLF? 供应商设备封装:16-MLF?（3x3） 包装:带卷 (TR) 其它名称:SY58052UMGTRSY58052UMGTR-ND |
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