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参数资料
型号： M1A3PE1500-FGG676I
厂商： Microsemi SoC
文件页数： 63/162页
文件大小： 0K
描述： IC FPGA 1KB FLASH 1.5M 676-FBGA
标准包装： 40
系列： ProASIC3E
RAM 位总计： 276480
输入/输出数： 444
门数： 1500000
电源电压： 1.425 V ~ 1.575 V
安装类型： 表面贴装
工作温度： -40°C ~ 85°C
封装/外壳： 676-BGA
供应商设备封装： 676-FBGA（27x27）
ProASIC3E Flash Family FPGAs
Revision 13
5-5
Revision 3 (Apr 2008)
Packaging v1.2
The following pins had duplicates and the extra pins were deleted from the
"PQ208" A3PE3000 table:
36, 62, 171
Note: There were no pin function changes in this update.
4-6
The following pins had duplicates and the extra pins were deleted from the
"FG324" table:
E2, E3, E16, E17, P2, P3, T16, U17
Note: There were no pin function changes in this update.
4-12
The "FG256" pin table was updated for the A3PE600 device because the old PAT
were based on the IFX die, and this is the final UMC die version.
4-9
The "FG484" was updated for the A3PE600 device because the old PAT were
based on the IFX die, and this is the final UMC die version.
4-17
The following pins had duplicates and the extra pins were deleted from the
"FG896" table:
AD6, AE5, AE28, AF29, F5, F26, G6, G25
Note: There were no pin function changes in this update.
4-41
Revision 2 (Mar 2008)
Product Brief rev. 1
The FG324 package was added to the "ProASIC3E Product Family" table, the
"I/Os Per Package1" table, and the "Temperature Grade Offerings" table for
A3PE3000.
I, II, IV
Revision 1 (Feb 2008)
DC
and
Switching
Characteristics v1.1
In Table 2-3 Flash Programming Limits – Retention, Storage and Operating
Temperature 1, Maximum Operating Junction Temperature was changed from
110°C to 100°C for both commercial and industrial grades.
2-2
The "PLL Behavior at Brownout Condition" section is new.
2-4
In the "PLL Contribution—PPLL" section, the following was deleted:
FCLKIN is the input clock frequency.
2-10
In Table 2-14 Summary of Maximum and Minimum DC Input Levels, the note
was incorrect. It previously said TJ and it was corrected and changed to TA.
2-17
In Table 2-98 ProASIC3E CCC/PLL Specification, the SCLK parameter and note
1 are new.
2-69
Table 2-103 JTAG 1532 was populated with the parameter data, which was not
in the previous version of the document.
2-82
Revision 1 (cont’d)
Packaging v1.1
The "PQ208" pin table for A3PE3000 was updated.
4-6
The "FG324" pin table for A3PE3000 is new.
4-13
The "FG484" pin table for A3PE3000 is new.
4-27
The "FG896" pin table for A3PE3000 is new.
4-41
Revision 0 (Jan 2008) This document was previously in datasheet v2.1. As a result of moving to the
handbook format, Actel has restarted the version numbers. The new version
number is 51700098-001-0.
N/A
v2.1
(July 2007)
CoreMP7 information was removed from the "Features and Benefits" section.
i
The M1 device part numbers have been updated in Table 4 ProASIC3E
Product Family, "Packaging Tables", "Temperature Grade Offerings", "Speed
Grade and Temperature Grade Matrix", and "Speed Grade and Temperature
Grade Matrix".
ii, iii,
iv, iv
Revision
Changes
Page
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相关代理商/技术参数
参数描述
M1A3PE1500-FGG896 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs
M1A3PE1500-FGG896ES 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs
M1A3PE1500-FGG896I 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs
M1A3PE1500-FGG896PP 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs
M1A3PE1500-FPQ208 制造商:Microsemi Corporation 功能描述:FPGA PROASIC3E 1.5M GATES 193MHZ 130NM 1.5V 208PQFP - Trays
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