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参数资料
| 型号： | M306K9F8LRP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP144 |
| 封装： | 16 X 16 MM, 0.40 MM PITCH, PLASTIC, TQFP-144 |
| 文件页数： | 48/101页 |
| 文件大小： | 2590K |
| 代理商： | M306K9F8LRP |
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Clock Generating Circuit
Rev.1.00
Jun 06, 2003
page 33 of 290
M16C/6K9 Group
Fig.WA-4 System clock control registers 0 and 1
System clock control register 0 (Note 1)
Symbol
Address
When reset
CM0
000616
4816
Bit name
Function
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
0 0 : I/O port P57
0 1 : fC output
1 0 : f8 output
1 1 : f32 output
b1 b0
CM07
CM05
CM04
CM03
CM01
CM02
CM00
CM06
Clock output function
select bit
WAIT peripheral function
clock stop bit
0 :Do not stop peripheral clock in wait mode
1 :Stop peripheral clock in wait mode (Note8)
XCIN-XCOUT drive capacity
select bit (Note 2)
0 : LOW
1 : HIGH
Port XC select bit
0 : I/O port
1 : XCIN-XCOUT generation
Main clock (XIN-XOUT)
stop bit
(Note 3) (Note 4) (Note 5)
0 : On
1 : Off
Main clock division select
bit 0 (Note 7)
0 : CM16 and CM17 valid
1 : Division by 8 mode
System clock select bit
(Note 6)
0 : XIN, XOUT
1 : XCIN, XCOUT
Note 1: Set bit 0 of the protect register (address 000A16) to "1" before writing to this register.
Note 2: Changes to "1" when shiffing to stop mode.
Note 3: When entering power saving mode, main clock stops using this bit. When returning from stop
mode and operating with XIN, set this bit to "0". When main clock oscillation is operating by
itself, set system clock select bit (CM07) to "1" before setting this bit to "1".
Note 4: When inputting external clock, only clock oscillation buffer is stopped and clock input is acceptable.
Note 5: If this bit is set to "1", XOUT turns "H". The built-in feedback resistor remains ON, so XIN turns pulled
up to XOUT ("H") via the feedback resistor.
Note 6: In the case of setting the bit from "0" to "1", set port XC select bit (CM04) to "1" and wait for the
subclock being stable before wrting the bit. Don't write in the same time.
In the case of setting the bit from "1" to "0", set main clock stop bit (CM05) to "0" and wait for the main
clock being stable before write the bit.
Note 7: The bit is set to "1" when shifting from high speed mode or mid speed mode to stop mode and after reset.
The bit maintains in low speed mode and power save mode.
Note 8: fc32 is not included. Do not set to "1" when using low-speed or low power dissipation mode.
W
R
System clock control register 1 (Note 1)
Symbol
Address
When reset
CM1
000716
2016
Bit name
Function
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
CM10
All clock stop control bit
(Note4)
0 : Clock on
1 : All clocks off (stop mode)
Note 1: Set bit 0 of the protect register (address 000A16) to "1" before writing to this register.
Note 2: Changes to "1" when shiffing to stop mode.
Note 3: Can be selected when bit 6 of the system clock control register 0 (address 000616) is "0".
If "1", division mode is fixed at 8.
Note 4: If this bit is set to "1", XOUT turns "H", and the built-in feedback resistor turns null.
CM15
XIN-XOUT drive capacity
select bit (Note 2)
0 : LOW
1 : HIGH
W
R
CM16
CM17
Reserved bit
Always set to
“0”
Reserved bit
Always set to
“0”
Main clock division
select bit 1 (Note 3)
0 0 : No division mode
0 1 : Division by 2 mode
1 0 : Division by 4 mode
1 1 : Division by 16 mode
b7 b6
0
Reserved bit
Always set to
“0”
Reserved bit
Always set to
“0”
0
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