- 您现在的位置：买卖IC网 > PDF目录80395 > M37270EF-XXXSP 8-BIT, OTPROM, 8.1 MHz, MICROCONTROLLER, PDIP64 PDF资料下载
参数资料
| 型号： | M37270EF-XXXSP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, OTPROM, 8.1 MHz, MICROCONTROLLER, PDIP64 |
| 封装： | 0.750 INCH, 1.78 MM PITCH, PLASTIC, SDIP-64 |
| 文件页数： | 25/97页 |
| 文件大小： | 1359K |
| 代理商： | M37270EF-XXXSP |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页当前第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页
MITSUBISHI MICROCOMPUTERS
M37270MF-XXXSP
M37270EF-XXXSP, M37270EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
28
(1) Clamping Circuit and Low-pass Filter
This filter attenuates the noise of the composite video signal input
from the CVIN pin. The CVIN pin to which composite video signal is
input requires a capacitor (0.1
F) coupling outside. Pull down the
CVIN pin with a resistor of hundreds of kiloohms to 1 M . In addition,
we recommend to install externally a simple low-pass filter using a
resistor and a capacitor at the CVIN pin (refer to Figure 19).
(2) Sync Slice Circuit
This circuit takes out a composite sync signal from the output signal
of the low-pass filter. Figure 21 shows the structure of the sync slice
register.
(3) Synchronizing Signal Separation Circuit
This circuit separates a horizontal synchronizing signal and a vertical
synchronizing signal from the composite sync signal taken out in the
sync slice circuit.
Horizontal synchronizing signal (Hsep)
A one-shot horizontal synchronizing signal Hsep is generated at
the falling edge of the composite sync signal.
Vertical synchronizing signal (Vsep)
As a Vsep signal generating method, it is possible to select one of
the following 2 methods by using bit 7 of the sync slice register
(address 00E316).
Method 1
The “L” level width of the composite sync signal is
measured. If this width exceeds a certain time, a Vsep
signal is generated in synchronization with the rising
of the timing signal immediately after this “L” level.
Method 2
The “L” level width of the composite sync signal is
measured. If this width exceeds a certain time, it is
detected whether a falling of the composite sync
signal exits or not in the “L” level period of the timing
signal immediately after this “L” level. If a falling exists,
a Vsep signal is generated in synchronization with
the rising of the timing signal (refer to Figure 22).
Figure 22 shows a Vsep generating timing. The timing signal shown
in the figure is generated from the reference clock which the timing
generating circuit outputs.
Reading bit 5 of data slicer control register 2 permits determinating
the shape of the V-pulse portion of the composite sync signal. As
shown in Figure 23, when the A level matches the B level, this bit is
“0.” In the case of a mismatch, the bit is “1.”
For the pins RVCO and the HLF, connect a resistor and a capacitor
as shown in Figure 19. Make the length of wiring which is connected
to these pins as short as possible so that a leakage current may not
be generated.
Note: It takes a few tens of milliseconds until the reference clock
becomes stable after the data slicer and the timing signal
generating circuit are started. In this period, various timing
signals, Hsep signals and Vsep signals become unstable. For
this reason, take stabilization time into consideration when
programming.
Fig. 21. Structure of sync slice register
Fig. 22. Vsep generating timing (method 2)
Composite
sync signal
Timing
signal
Vsep signal
Measure “L” period
A Vsep signal is generated at a rising of the timing signal
immediately after the “L” level width of the composite
sync signal exceeds a certain time.
00
0
7
Sync slice register
(SSL : address 00E316)
Fix these bits to “00001012”
Vertical synchronizing
signal (Vsep) generating
method selection bit
0 : Method 1
1 : Method 2
00
1
相关PDF资料 |
PDF描述 |
|---|---|
| M37906M8C-XXXSP | 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PDIP42 |
| MB96F346YSAPMC-GE2 | 16-BIT, FLASH, 56 MHz, MICROCONTROLLER, PQFP100 |
| MB96F386RSAPMC-GE2 | 16-BIT, FLASH, 56 MHz, MICROCONTROLLER, PQFP120 |
| MB96336YWAPMC-GSE2 | 16-BIT, MROM, 48 MHz, MICROCONTROLLER, PQFP144 |
| MK2049-35SITR | 49.152 MHz, OTHER CLOCK GENERATOR, PDSO20 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M37270ERSS | 功能描述:EMULATION MCU/8BIT CMOS EMULATIO RoHS:否 类别:编程器，开发系统 >> 配件 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program RoHS指令信息:IButton RoHS Compliance Plan 标准包装:1 系列:- 附件类型:USB 至 1-Wire? RJ11 适配器 适用于相关产品:1-Wire? 设备 产品目录页面:1429 (CN2011-ZH PDF) |
| M37270MF | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER |
| M37270MF-100SP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER |
| M37270MF-101SP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER |
| M37270MF-103SP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER |
发布紧急采购，3分钟左右您将得到回复。