- 您现在的位置：买卖IC网 > PDF目录80395 > M37270EF-XXXSP 8-BIT, OTPROM, 8.1 MHz, MICROCONTROLLER, PDIP64 PDF资料下载
参数资料
| 型号： | M37270EF-XXXSP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, OTPROM, 8.1 MHz, MICROCONTROLLER, PDIP64 |
| 封装： | 0.750 INCH, 1.78 MM PITCH, PLASTIC, SDIP-64 |
| 文件页数： | 41/97页 |
| 文件大小： | 1359K |
| 代理商： | M37270EF-XXXSP |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页当前第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页
MITSUBISHI MICROCOMPUTERS
M37270MF-XXXSP
M37270EF-XXXSP, M37270EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
43
When the first-byte address data matches the slave address, the
AAS bit of the I2C status register (address 00F816) is set to “1.” After
the second-byte address data is stored into the I2C data shift register
(address 00F616), make an address comparison between the sec-
ond-byte data and the slave address by software. When the address
data of the 2nd byte matches the slave address, set the RBW bit of
the I2C address register (address 00F716) to “1” by software. This
processing can match the 7-bit slave address and R/W data, which
are received after a RESTART condition is detected, with the value
of the I2C address register (address 00F716). For the data transmis-
sion format when the 10-bit addressing format is selected, refer to
Figure 46, (3) and (4).
(10) Example of Master Transmission
An example of master transmission in the standard clock mode, at
the SCL frequency of 100 kHz and in the ACK return mode is shown
below.
Set a slave address in the high-order 7 bits of the I2C address
register (address 00F716) and “0” in the RBW bit.
Set the ACK return mode and SCL = 100 kHz by setting “8516” in
the I2C clock control register (address 00FA16).
Set “1016” in the I2C status register (address 00F816) and hold
the SCL at the “H” level.
Set a communication enable status by setting “4816” in the I2C
control register (address 00F916).
Set the address data of the destination of transmission in the high-
order 7 bits of the I2C data shift register (address 00F616) and set
“0” in the least significant bit.
Set “F016” in the I2C status register (address 00F816) to generate
a START condition. At this time, an SCL for 1 byte and an ACK
clock automatically occurs.
Set transmit data in the I2C data shift register (address 00F616).
At this time, an SCL and an ACK clock automatically occurs.
When transmitting control data of more than 1 byte, repeat step
.
Set “D016” in the I2C status register (address 00F816). After this,
if ACK is not returned or transmission ends, a STOP condition
occurs.
(11) Example of Slave Reception
An example of slave reception in the high-speed clock mode, at the
SCL frequency of 400 kHz, in the ACK non-return mode and using
the addressing format is shown below.
Set a slave address in the high-order 7 bits of the I2C address
register (address 00F716) and “0” in the RBW bit.
Set the no ACK clock mode and SCL = 400 kHz by setting “2516”
in the I2C clock control register (address 00FA16).
Set “1016” in the I2C status register (address 00F816) and hold
the SCL at the “H” level.
Set a communication enable status by setting “4816” in the I2C
control register (address 00F916).
When a START condition is received, an address comparison is
made.
When all transmitted addresses are “0” (general call)
AD0 of the I2C status register (address 00F816) is set to “1” and
an interrupt request signal occurs.
When the transmitted addresses match the address set in
AAS of the I2C status register (address 00F816) is set to “1” and
an interrupt request signal occurs.
In the cases other than the above
AD0 and AAS of the I2C status register (address 00F816) are
set to “0” and no interrupt request signal occurs.
Set dummy data in the I2C data shift register (address 00F616).
When receiving control data of more than 1 byte, repeat step .
When a STOP condition is detected, the communication ends.
相关PDF资料 |
PDF描述 |
|---|---|
| M37906M8C-XXXSP | 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PDIP42 |
| MB96F346YSAPMC-GE2 | 16-BIT, FLASH, 56 MHz, MICROCONTROLLER, PQFP100 |
| MB96F386RSAPMC-GE2 | 16-BIT, FLASH, 56 MHz, MICROCONTROLLER, PQFP120 |
| MB96336YWAPMC-GSE2 | 16-BIT, MROM, 48 MHz, MICROCONTROLLER, PQFP144 |
| MK2049-35SITR | 49.152 MHz, OTHER CLOCK GENERATOR, PDSO20 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M37270ERSS | 功能描述:EMULATION MCU/8BIT CMOS EMULATIO RoHS:否 类别:编程器，开发系统 >> 配件 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program RoHS指令信息:IButton RoHS Compliance Plan 标准包装:1 系列:- 附件类型:USB 至 1-Wire? RJ11 适配器 适用于相关产品:1-Wire? 设备 产品目录页面:1429 (CN2011-ZH PDF) |
| M37270MF | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER |
| M37270MF-100SP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER |
| M37270MF-101SP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER |
| M37270MF-103SP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER |
发布紧急采购，3分钟左右您将得到回复。