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| 型号： | M37546G2SP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP32 |
| 封装： | 8.90 X 28 MM, 1.78 MM PITCH, PLASTIC, SDIP-32 |
| 文件页数： | 27/105页 |
| 文件大小： | 1105K |
| 代理商： | M37546G2SP |
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REJ03B0160-0122 Rev.1.22 Mar 13, 2009
page 26 of 100
7546 Group
Fig. 24 Timing of interrupt request generation, interrupt request bit, and interrupt acceptance
Fig. 23 Interrupt sequence
φ
SYNC
RD
WR
Address bus
Data bus
PC
Not used
S,SPS
S-1,SPS S-2,SPS
BL
BH
AL,AH
PCH
PCL
PS
AL
AH
SYNC : CPU operation code fetch cycle
(This is an internal signal that cannot be observed from the external unit.)
BL, BH : Vector address of each interrupt
AL, AH : Jump destination address of each interrupt
SPS
: “0016” or “0116”
([SPS] is a page selected by the stack page selection bit of CPU mode register.)
Push onto stack
Vector fetch
Execute interrupt
routine
Instruction cycle
Push onto stack
Vector fetch
Instruction cycle
Internal clock φ
SYNC
T1
IR1 T2
IR2 T3
T1 T2 T3 : Interrupt acceptance timing points
IR1 IR2 : Timings points at which the interrupt request bit is set to “1”.
Note : Period 2 indicates the last φ cycle during one instruction cycle.
(1) The interrupt request bit for an interrupt request generated during period 1 is set to “1” at timing point IR1.
(2) The interrupt request bit for an interrupt request generated during period 2 is set to “1” at timing point IR1 or IR2.
The timing point at which the bit is set to “1” varies depending on conditions. When two or more interrupt
requests are generated during the period 2, each request bit may be set to “1” at timing point IR1 or IR2
separately.
■ Notes on Interrupts
When setting the followings, the interrupt request bit may be set to
“1”.
<When switching external interrupt active edge>
INT0 interrupt edge selection bit
(bit 0 of Interrupt edge selection register (address 3A16))
INT1 interrupt edge selection bit
(bit 1 of Interrupt edge selection register)
CNTR0 active edge switch bit
(bit 2 of timer X mode register (address 2B16))
Capture 0 interrupt edge selection bit
(bits 1 and 0 of capture mode register (address 2016))
Capture 1 interrupt edge selection bit
(bits 3 and 2 of capture mode register)
If it is not necessary to generate an interrupt synchronized with
these settings, take the following sequence.
(1) Set the corresponding enable bit to “0” (disabled).
(2) Set the interrupt edge selection bit (the active edge switch bit)
or the interrupt source bit.
(3) Set the corresponding interrupt request bit to “0” after one or
more instructions have been executed.
(4) Set the corresponding interrupt enable bit to “1” (enabled).
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相关代理商/技术参数 |
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| M37546G2SP#U0 | 功能描述:MCU 3/5V 8K 32-SDIP QZ-ROM RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 标准包装:250 系列:80C 核心处理器:8051 芯体尺寸:8-位 速度:16MHz 连通性:EBI/EMI，I²C，UART/USART 外围设备:POR，PWM，WDT 输入/输出数:40 程序存储器容量:- 程序存储器类型:ROMless EEPROM 大小:- RAM 容量:256 x 8 电压 - 电源 (Vcc/Vdd):4.5 V ~ 5.5 V 数据转换器:A/D 8x10b 振荡器型:内部 工作温度:-40°C ~ 85°C 封装/外壳:68-LCC（J 形引线） 包装:带卷 (TR) |
| M37546G2-XXXGP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37546G2-XXXHP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37546G2-XXXSP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37546G4GP | 功能描述:MCU 2/5V 16K 32-LQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 标准包装:250 系列:80C 核心处理器:8051 芯体尺寸:8-位 速度:16MHz 连通性:EBI/EMI，I²C，UART/USART 外围设备:POR，PWM，WDT 输入/输出数:40 程序存储器容量:- 程序存储器类型:ROMless EEPROM 大小:- RAM 容量:256 x 8 电压 - 电源 (Vcc/Vdd):4.5 V ~ 5.5 V 数据转换器:A/D 8x10b 振荡器型:内部 工作温度:-40°C ~ 85°C 封装/外壳:68-LCC（J 形引线） 包装:带卷 (TR) |
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