参数资料
型号: M37546G2SP
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP32
封装: 8.90 X 28 MM, 1.78 MM PITCH, PLASTIC, SDIP-32
文件页数: 60/105页
文件大小: 1105K
代理商: M37546G2SP
REJ03B0160-0122 Rev.1.22 Mar 13, 2009
page 56 of 100
7546 Group
Fig. 68 Block diagram of watchdog timer
Fig. 69 Structure of watchdog timer control register
Watchdog timer H (read only for high-order 6-bit)
Watchdog timer H count source selection bit
(Note 1, Note 4)
0 : Watchdog timer L underflow
1 : On-chip oscillator/16 or f(XIN)/16
b7
b0
Watchdog timer control register (Note 1)
(WDTCON: address 003916, initial value: 3F16)
STP instruction function selection bit
(Note 1, Note 3)
0 : System enters into the stop mode
at the STP instruction execution
1 : Internal reset occurs at the STP instruction execution
Notes 1: When the setting by the function set ROM data 2 (FSROM2) is performed, the initial value of CPUM is changed
after releasing reset since bits 6 and 7 of WDTCON are fixed.
2: The setting values of FSROM2 become valid by setting “0” to bit 0 of function set ROM data 0 (FSROM0).
The setting values of FSROM2 are invalid by setting “1” to this bit.
This cannot be controlled by FSROM2.
This bit function can be set by setting bit 3 of FSROM2.
Bit 3 of FSROM2 = 0: Bit 6 of WDTCON is fixed to “0”.
Bit 3 of FSROM2 = 1: Bit 6 of WDTCON is fixed to “1”.
Control by Function set ROM data 2
(FSROM2: address FFDA16) (Note 2)
The initial value of this bit is changed by setting bit 2 of
FSROM2.
Bit 2 of FSROM2 = 0:
Initial value of bit 7 of WDTCON is changed to “0”.
Bit 2 of FSROM2 = 1:
Initial value of bit 7 of WDTCON is changed to “1”.
The following setting can be available by setting bit 0 of FSROM2.
(This setting cannot be set by WDTCON)
Bit 0 of FSROM2 = 0: The source clock of watchdog timer is always
Bit 0 of FSROM2 = 1: The source clock of watchdog timer is the
on-chip oscillator output/16 of f(XIN)/16.
3:The setting value of this bit can be fixed after releasing reset by FSROM2, and then, the setting value cannot be changed by program.
Also, when the setting by program is performed, this bit can be rewritten only once after releasing reset.
After rewriting it is disable to write any data to this bit.
4: When FSROM2 is used to select the watchdog timer H count source, the initial value of this bit is changed after releasing reset.
the on-chip oscillator output/16.
“0”
“1”
1/16
Reset pin input
WDTCON: Watchdog timer control register
FSROM2: Function set ROM data 2
XIN clock
On-chip oscillator
CPUM: CPU mode register
Data bus
Reset
circuit
Watchdog timer H (8)
Write "FF16" to
WDTCON
Internal reset
Watchdog timer L (8)
STP Instruction
Write “FF16” to
WDTCON
Watchdog timer H count source
selection bit (bit 2 of FSROM2)
or bit 7 of WDTCON
Source clock selection
(auto-switch depending on setting of CPUM)
STP instruction function selection bit
(bit 3 of FSROM2)
Bit 6 of WDTCON
On-chip oscillator output can be
fixed by bit 0 of FSROM2
Count start
(Watchdotm timer start selection bit
(bit 1 of FSROM2))
or writing arbitrary value to WDTCON
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