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参数资料
| 型号： | M38D24G6-XXXFP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, FLASH, 6.25 MHz, MICROCONTROLLER, PQFP64 |
| 封装： | 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-64 |
| 文件页数： | 109/136页 |
| 文件大小： | 2856K |
| 代理商： | M38D24G6-XXXFP |
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Rev.3.02
Apr 10, 2008
Page 74 of 131
REJ03B0177-0302
38D2 Group
Fig 73. Structure of flash memory control register 2
Figure 74 shows a flowchart for setting/releasing CPU rewrite mode.
Fig 74. CPU rewrite mode set/release flowchart be sure to execute
Flash memory control register 2
(FM CR2: address : 0FE216, initial value: 4516)
Not used (return “1” when read)
Not used (do not write “1” to this bit.)
Not used (return “1” when read)
Not used (return “0” when read)
User block 0 E/W enable bit (1, 2)
0 : E/W disabled (800016-FFFF16)
1 : E/W enabled (800016-FFFF16)
Not used (return “0” when read)
Not used (return “1” when read)
Not used (return “0” when read)
b7
b0
Notes 1: For this bit to be set to “1”, the user needs to write a “0” and then a
“1” to it in succession. For this bit to be set to “0”, write “0” only to this
bit.
2: Effective only when the CPU rewrite m ode select bit = “1”.
Table 16 State of E/W inhibition function
User block 0
E/W enable bit
User block 1
E/W enable bit
User block 0
Addresses 800016 to FFFF16
User block 1
Addresses 180016 to 7FFF16
Data block
Addresses 100016 to 17FF16
0
E/W disabled
E/W enabled
0
1
E/W disabled
E/W enabled
1
0
E/W enabled
E/W disabled
E/W enabled
1
E/W enabled
Start
Single-chip mode or Boot mode
Set CPU mode register(1)
Jump to control program transferred to internal RAM
(Subsequent operations are executed by control program in
this RAM)
Transfer CPU rewrite mode control program to internal RAM
Set CPU rewrite mode select bit to “1” (by writing “0” and
then “1” in succession)
Using software command executes erase, program, or other
operation
End
Write “0” to CPU rewrite mode select bit
Set user block 0 E/W enable bit to “1” (by writing “0” and
then “1” in succession)
Set user block 1 E/W enable bit (At E/W disabled; writing
“0” , at E/W enabled;
writing “0” and then “1” in succession
Execute read array command(2)
Set user block 0 E/W enable bit to “0”
Set user block 1 E/W enable bit to “0”
Notes 1: Set the main clock as follows depending on the clock division ratio selection bits of CPU mode register (bits 6, 7 of address 003B16).
2: Before exiting the CPU rewrite mode after completing erase or program operation, always be sure to execute the read array command.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M38D24G6XXXHP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38D24G7XXXFP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38D24G7XXXHP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38D24G8XXXFP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38D24G8XXXHP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
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