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参数资料
| 型号： | M390S1723DTU-C7A |
| 元件分类： | DRAM |
| 英文描述： | 16M X 72 SYNCHRONOUS DRAM MODULE, 5.4 ns, DMA168 |
| 封装： | DIMM-168 |
| 文件页数： | 1/12页 |
| 文件大小： | 188K |
| 代理商： | M390S1723DTU-C7A |
M390S1723DTU
Rev. 0.1. Sept. 2001
PC133/PC100 Low Profile Registered DIMM
PIN NAMES
*
These pins are not used in this module.
** These pins should be NC in the system
which does not support SPD.
Pin Name
Function
A0 ~ A11
Address input (Multiplexed)
BA0 ~ BA1
Select bank
DQ0 ~ DQ63
Data input/output
CB0 ~ CB7
Check bit (Data-in/data-out)
CLK0
Clock input
CKE0
Clock enable input
CS0, CS2
Chip select input
RAS
Row address strobe
CAS
Colume address strobe
WE
Write enable
DQM0 ~ 7
DQM
VDD
Power supply (3.3V)
VSS
Ground
*VREF
Power supply for reference
REGE
Register enable
SDA
Serial data I/O
SCL
Serial clock
SA0 ~ 2
Address in EEPROM
DU
Don
′t use
NC
No connection
PIN CONFIGURATIONS (Front side/back side)
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Front
VSS
DQ0
DQ1
DQ2
DQ3
VDD
DQ4
DQ5
DQ6
DQ7
DQ8
VSS
DQ9
DQ10
DQ11
DQ12
DQ13
VDD
DQ14
DQ15
CB0
CB1
VSS
NC
VDD
WE
DQM0
Pin
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
Front
DQM1
CS0
DU
VSS
A0
A2
A4
A6
A8
A10/AP
BA1
VDD
CLK0
VSS
DU
CS2
DQM2
DQM3
DU
VDD
NC
CB2
CB3
VSS
DQ16
DQ17
Pin
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
Front
DQ18
DQ19
VDD
DQ20
NC
*VREF
*CKE1
VSS
DQ21
DQ22
DQ23
VSS
DQ24
DQ25
DQ26
DQ27
VDD
DQ28
DQ29
DQ30
DQ31
VSS
*CLK2
NC
**SDA
**SCL
VDD
Pin
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
Back
VSS
DQ32
DQ33
DQ34
DQ35
VDD
DQ36
DQ37
DQ38
DQ39
DQ40
VSS
DQ41
DQ42
DQ43
DQ44
DQ45
VDD
DQ46
DQ47
CB4
CB5
VSS
NC
VDD
CAS
DQM4
Pin
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
Back
DQM5
*CS1
RAS
VSS
A1
A3
A5
A7
A9
BA0
A11
VDD
*CLK1
*A12
VSS
CKE0
*CS3
DQM6
DQM7
*A13
VDD
NC
CB6
CB7
VSS
DQ48
DQ49
Pin
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
Back
DQ50
DQ51
VDD
DQ52
NC
*VREF
REGE
VSS
DQ53
DQ54
DQ55
VSS
DQ56
DQ57
DQ58
DQ59
VDD
DQ60
DQ61
DQ62
DQ63
VSS
*CLK3
NC
**SA0
**SA1
**SA2
VDD
The Samsung M390S1723DTU is a 16M bit x 72 Synchronous
Dynamic RAM high density memory module. The Samsung
M390S1723DTU consists of nine CMOS 16Mx8 bit Synchro-
nous DRAMs in TSOP-II 400mil packages, two 18-bits Drive
ICs for input control signal and one 2K EEPROM in 8-pin
TSSOP package for Serial Presence Detect on a 168pin glass-
epoxy substrate. Three 0.1uF decoupling capacitors are
mounted on the printed circuit board in parallel for each
SDRAM. The M390S1723DTU is a Dual In-line Memory Module
and is intented for mounting into 168-pin edge connector sock-
ets.
Synchronous design allows precise cycle control with the use
of system clock. I/O transactions are possible on every clock
cycle. Range of operating frequencies, programmable latencies
allows the same device to be useful for a variety of high band-
width, high performance memory system applications.
GENERAL DESCRIPTION
M390S1723DTU SDRAM DIMM
16Mx72 SDRAM DIMM with PLL & Register based on 16Mx8, 4Banks 4K Ref., 3.3V Synchronous DRAMs with SPD
Performance range
Burst mode operation
Auto & self refresh capability (4096 Cycles/64ms)
LVTTL compatible inputs and outputs
Single 3.3V
± 0.3V power supply
MRS cycle with address key programs
Latency (Access from column address)
Burst length (1, 2, 4, 8 & Full page)
Data scramble (Sequential & Interleave)
All inputs are sampled at the positive going edge of the
system clock
Serial presence detect with EEPROM
PCB : Height (1,200mil), double sided component
Part No.
Max Freq. (Speed)
M390S1723DTU-C7C
133MHz (7.5ns @ CL=2)
M390S1723DTU-C7A
133MHz (7.5ns @ CL=3)
M390S1723DTU-C1H
100MHz (10ns @ CL=2)
M390S1723DTU-C1L
100MHz (10ns @ CL=3)
FEATURE
SAMSUNG ELECTRONICS CO., Ltd. reserves the right to change products and specifications without notice.
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| M390S2858CT1 | 制造商:SAMSUNG 制造商全称:Samsung semiconductor 功能描述:SDRAM DIMM |
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