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参数资料
| 型号： | M390S1723DTU-C7A |
| 元件分类： | DRAM |
| 英文描述： | 16M X 72 SYNCHRONOUS DRAM MODULE, 5.4 ns, DMA168 |
| 封装： | DIMM-168 |
| 文件页数： | 11/12页 |
| 文件大小： | 188K |
| 代理商： | M390S1723DTU-C7A |
M390S1723DTU
Rev. 0.1. Sept. 2001
PC133/PC100 Low Profile Registered DIMM
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
Notes :
AC CHARACTERISTICS (AC operating conditions unless otherwise noted)
Parameter
Symbol
- 7C
- 7A
- 1H
- 1L
Unit
Note
Min
Max
Min
Max
Min
Max
Min
Max
CLK cycle
time
CAS latency=3
tCC
7.5
1000
7.5
1000
10
1000
10
1000
ns
1
CAS latency=2
7.5
10
12
CLK to valid
output delay
CAS latency=3
tSAC
5.4
6
ns
1,2
CAS latency=2
5.4
6
7
Output data
hold time
CAS latency=3
tOH
3
ns
2
CAS latency=2
3
CLK high pulse width
tCH
2.5
3
ns
3
CLK low pulse width
tCL
2.5
3
ns
3
Input setup time
tSS
1.5
2
ns
3
Input hold time
tSH
0.8
1
ns
3
CLK to output in Low-Z
tSLZ
1
ns
2
CLK to output
in Hi-Z
CAS latency=3
tSHZ
5.4
6
ns
CAS latency=2
5.4
6
7
REFER TO THE INDIVIDUAL COMPONENET, NOT THE WHOLE MODULE.
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相关代理商/技术参数 |
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| M390S2858CT1 | 制造商:SAMSUNG 制造商全称:Samsung semiconductor 功能描述:SDRAM DIMM |
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