参数资料
型号: M52259EVB
厂商: Freescale Semiconductor
文件页数: 27/46页
文件大小: 0K
描述: BOARD EVAL FOR 52259 COLDFIRE V2
产品培训模块: ColdFire MCF5225x
标准包装: 1
系列: ColdFire®
类型: MCU
适用于相关产品: MCF52259
所含物品: 板,线缆,文档,DVD,闪光灯驱动和电源
Electrical Characteristics
Table 8. Thermal Characteristics (continued)
Characteristic
Symbol
Value
Unit
42
100 LQFP
Junction to ambient, natural convection
Junction to ambient, natural convection
Junction to ambient, (@200 ft/min)
Junction to ambient, (@200 ft/min)
Single layer board (1s)
Four layer board (2s2p)
Single layer board (1s)
Four layer board (2s2p)
? JA
? JA
? JMA
? JMA
53 13,14
39 1,15
1,3
33 1,3
? C / W
? C / W
? C / W
? C / W
Junction to board
? JB
25
? C / W
9
2
Junction to case
Junction to top of package
Natural convection
? JC
? jt
? C / W
? C / W
Maximum operating junction temperature
T j
105
o
C
1
? JA and ? jt parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection. Freescale
recommends the use of ? JA and power dissipation specifications in the system design to prevent device junction
temperatures from exceeding the rated specification. System designers should be aware that device junction temperatures
can be significantly influenced by board layout and surrounding devices. Conformance to the device junction temperature
specification can be verified by physical measurement in the customer’s system using the ? jt parameter, the device power
dissipation, and the method described in EIA/JESD Standard 51-2.
2 Per JEDEC JESD51-2 with the single-layer board (JESD51-3) horizontal.
3 Per JEDEC JESD51-6 with the board JESD51-7) horizontal.
4 Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8. Board
temperature is measured on the top surface of the board near the package.
5 Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883
Method 1012.1).
6 Thermal characterization parameter indicating the temperature difference between package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written
in conformance with Psi-JT.
7 ? JA and ? jt parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection. Freescale
recommends the use of ? JA and power dissipation specifications in the system design to prevent device junction
temperatures from exceeding the rated specification. System designers should be aware that device junction temperatures
can be significantly influenced by board layout and surrounding devices. Conformance to the device junction temperature
specification can be verified by physical measurement in the customer’s system using the ? jt parameter, the device power
dissipation, and the method described in EIA/JESD Standard 51-2.
8 Per JEDEC JESD51-2 with the single-layer board (JESD51-3) horizontal.
9
Per JEDEC JESD51-6 with the board JESD51-7) horizontal.
10 Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8. Board
temperature is measured on the top surface of the board near the package.
11 Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883
Method 1012.1).
12 Thermal characterization parameter indicating the temperature difference between package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written
in conformance with Psi-JT.
13
? JA and ? jt parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection. Freescale
recommends the use of ? JA and power dissipation specifications in the system design to prevent device junction
temperatures from exceeding the rated specification. System designers should be aware that device junction temperatures
can be significantly influenced by board layout and surrounding devices. Conformance to the device junction temperature
specification can be verified by physical measurement in the customer’s system using the ? jt parameter, the device power
dissipation, and the method described in EIA/JESD Standard 51-2.
14 Per JEDEC JESD51-2 with the single-layer board (JESD51-3) horizontal.
15
27
Per JEDEC JESD51-6 with the board JESD51-7) horizontal.
MCF52259 ColdFire Microcontroller, Rev. 5
Freescale
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