参数资料
型号: M69AW024BL70ZB8T
厂商: 意法半导体
英文描述: 16 Mbit (1M x16) 3V Asynchronous PSRAM
中文描述: 16兆位(1米× 16)3V的异步移动存储芯片
文件页数: 14/29页
文件大小: 429K
代理商: M69AW024BL70ZB8T
M69AW024B
14/29
Note: 1. C
L
= 50pF with 1 TTL and R1=50
.
2. C
L
= 5pF
3. t
ELQV
is applicable if G is brought to Low before E1 goes Low and if actual value of either t
AVGL1
or t
ELGL
, or both, is shorter than
the specified value.
4. Only applicable to A0, A1 and A2 when both and G and E1 are kept Low for Address access.
5. Applicable if G is brought to Low before E1 goes Low.
6. t
AVGL1
, t
ELGL
(Min) and t
GHGL1
(Min) are reference values when the access time is determined by t
GLQV
. If the actual value of each
parameter is lower than the specified minimum values, t
GLQV
is increased by the difference between the actual value and the spec-
ified minimum value.
7. t
AVGL2
and t
GHGL2
correspond to absolute minimum values during G controlled access.
8. t
AXAV
is applicable when two or more addresses from A0 to A2 are switched from the previous state.
9. If the actual value of t
ELGL
or t
GHGL1
is lower than the specified minimum value, t
GLAX
and t
GLEH
will be equal to t
AVAX
(Min)
t
ELGL
(Actual) and t
AVAX
(Min)
t
GHGL1
(Actual), respectively.
10. The maximum value is applicable if E1 is kept Low.
t
GLQV(1)
t
OE
Output Enable Access Time
35
40
ns
t
GLQX(2)
t
OLZ
Output Enable Low to Output Lo-Z
0
0
ns
Symbol
Alt.
Parameter
M69AW024B
Unit
–60
–70
Min
Max
Min
Max
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