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参数资料
型号： M7020R
厂商： 意法半导体
英文描述： 32K x 68-bit Entry NETWORK SEARCH ENGINE
中文描述： 32K的× 68位进入网络搜索引擎
文件页数： 92/150页
文件大小： 996K
代理商： M7020R
M7020R
92/150
272-bit SEARCH on Tables x272-configured Using Up to Eight M7020R Devices
The hardware diagram of the search subsystem of
eight devices is shown in Figure 66, page 94. The
following are the parameters programmed in the
eight devices.
– First seven devices (devices 0–6):
CFG = 10101010, TLSZ = 01, HLAT = 000,
LRAM = 0, and LDEV = 0.
– Eighth device (device 7):
CFG = 10101010, TLSZ = 01, HLAT = 000,
LRAM = 1, and LDEV = 1.
Note:
All eight devices must be programmed with
the same value of TLSZ and HLAT. Only the last
device in the table must be programmed with
LRAM = 1 and LDEV = 1 (Device 7 in this case).
All other upstream devices must be programmed
with LRAM = 0 and LDEV = 0 (Devices 0 through
6 in this case).
Figure 68, page 96 shows the timing diagram for a
SEARCH command in the 272-bit-configured ta-
ble of eight devices for Device 0. Figure 69, page
97 shows the timing diagram for a SEARCH com-
mand in the 272-bit-configured table of eight de-
vices for Device 1. Figure 70, page 98 shows the
timing diagram for a SEARCH command in the
272-bit-configured table of eight devices for De-
vice 7 (the last device in this specific table). For
these timing diagrams three 272-bit searches are
performed sequentially. The following HIT/MISS
assumptions were made as shown in Table 43,
page 93.
The following is the sequence of operation for a
single 272-bit SEARCH command (also COM-
MAND CODES AND PARAMETERS, page 29).
–
Cycle A:
The host ASIC drives the CMDV high
and applies SEARCH command code ('10') on
CMD[1:0] signals. CMD[5:3] signals must be
driven with the index to the GMR pair used for
bits [271:136] of the data being searched in this
operation. DQ[67:0] must be driven with the 68-
bit data ([271:204]) to be compared against all
locations “0” in the four-word, 68-bit page. The
CMD[2] signal must be driven to logic '1.'
Note:
CMD[2] = 1 signals that the search is a
272-bit search. CMD[8:3] in this cycle is ig-
nored.
–
Cycle B:
The host ASIC continues to drive the
CMDV high and applies SEARCH command
code ('10') on CMD[1:0]. The DQ[67:0] is driven
with the 68-bit data ([203:136]) to be compared
against all locations “1” in the four 68-bits-word
page.
–
Cycle C:
The host ASIC drives the CMDV high
and applies SEARCH command code ('10') on
CMD[1:0] signals. CMD[5:3] signals must be
driven with the index to the GMR pair used for
bits [135:0] of the data being searched.
CMD[8:7] signals must be driven with the bits
that will be driven on SADR[21:20] by this de-
vice if it has a hit. DQ[67:0] must be driven with
the 68-bit data ([135:68]) to be compared
against all locations “2” in the four 68-bits-word
page. The CMD[2] signal must be driven to logic
'0.'
–
Cycle D:
The host ASIC continues to drive the
CMDV high and applies SEARCH command
code ('10') on CMD[1:0]. CMD[8:6] signals must
be driven with the index of the SSR that will be
used for storing the address of the matching en-
try and the Hit Flag (see SEARCH-Successful
Registers (SSR[0:7]), page 23). The DQ[67:0] is
driven with the 68-bit data ([67:0]) to be com-
pared to all locations “3” in the four 68-bits-word
page. CMD[5:2] is ignored because the LEARN
Instruction is not supported for x272 tables.
Note:
For 272-bit searches, the host ASIC must
supply four distinct 68-bit data words on
DQ[67:0] during Cycles A, B, C, and D. The
GMR Index in Cycle A selects a pair of GMRs in
each of the eight devices that apply to DQ data
in Cycles A and B. The GMR Index in Cycle C
selects a pair of GMRs in each of the eight de-
vices that apply to DQ data in Cycles C and D.
The logical 272-bit SEARCH operation is shown in
Figure 67, page 95. The entire table of 272-bit en-
tries is compared to a 272-bit word K that is pre-
sented on the DQ Bus in Cycles A, B, C, and D of
the command using the GMR and the local mask
bits. The GMR is the 272-bit word specified by the
two pairs of GMRs selected by the GMR Indexes
in the command’s Cycles A and C in each of the
eight devices. The 272-bit word K that is presented
on the DQ Bus in Cycles A, B, C, and D of the com-
mand is compared to each entry in the table start-
ing at location “0.” The first matching entry’s
location address, “L,” is the winning address that is
driven as part of the SRAM address on the
SADR[23:0] lines (see SRAM ADDRESSING,
page 126).
Note:
The matching address is always going to be
a location “0” in a four-entry page for 272-bit
SEARCH (two LSBs of the matching index will be
'00').
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