MA17501
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Table 5: Absolute Maximum Ratings
6.0 ABSOLUTE MAXIMUM RATINGS
Parameter
Min
Max
Units
Supply Voltage
-0.5
7
V
Input Voltage
-0.3
V
DD
+0.3
V
Current Through Any Pin
-20
+20
mA
Operating Temperature
-55
125
°
C
Storage Temperature
-65
150
°
C
Note:
Stresses above those listed may cause permanent
damage to the device. This is a stress rating only and
functional operation of the device at these conditions, or at
any other condition above those indicated in the operations
section of this specification, is not implied. Exposure to
absolute maximum rating conditions for extended periods
may affect device reliability.
Total Dose Radiation Not
Exceeding 3x10
5
Rad(Si)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
DD
V
IHC
V
ILC
V
IHT
V
ILT
V
CH
V
CL
V
OHC
V
OLC
V
OHT
V
OLT
V
OHCLK
V
OLCLK
I
I
I
OZ
I
IPU
I
DDOP
I
DDST
Supply Voltage
CMOS Input High Voltage (Note 1)
CMOS Input Low Voltage (Note 1)
TTL Input High Voltage (Note 2)
TTL Input Low Voltage (Note 2)
OSC Input High Voltage (Note 6)
OSC Input Low Voltage (Note 6)
CMOS Output High Voltage (Note 1)
CMOS Output Low Voltage (Note 1)
TTL Output High Voltage (Note 2)
TTL Output Low Voltage (Note 2)
Clock Output High Voltage (Note 3)
Clock Output Low Voltage (Note 3)
Input Leakage Current (Note 4)
Output Leakage Current (Note 4)
TESTN Input Pullup Current (Note 5)
Operating Supply Current
Static Supply Current
V
SS
= 0
-
-
-
-
-
-
I
OH
= -1.4mA, V
DD
= 4.5V
I
OL
= 2mA, V
DD
= 5.5V
I
OH
= -1.4mA, V
DD
= 4.5V
I
OH
= -1.4mA, V
DD
= 4.5V
I
OH
= -12mA, V
DD
= 4.5V
I
OL
= 12mA, V
DD
= 5.5V
V
DD
= 5.5V, V
IN
= 0V or 5.5V
V
DD
= 5.5V, V
O
= 0V or 5.5V
V
DD
= 5.5V, TESTN = 0V
V
DD
= 5.5V, OSC = 20MHz
V
DD
= 5.5V, OSC = 0MHz
4.5
V
DD
-1
-
2.0
-
4.0
-
4.0
-
3.5
-
4.0
-
-
-
-
-
-
5.0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-150
25
5
5.5
-
V
SS
+1
-
0.8
-
1.0
-
0.5
-
0.4
-
0.5
±
10
±
50
-300
35
10
V
V
V
V
V
V
V
V
V
V
V
V
V
μ
A
μ
A
μ
A
mA
mA
Mil-Std-883, Method 5005, Subgroup 1, 2, 3.
Notes:
1. The following signals are CMOS compatible:
a) CMOS inputs: Microcode Bus, (M00-M19), TESTN, IRDYN and PIFN.
b) CMOS outputs: T1, OVIN, INTREN, SYSCLK1N, CLKPCN and CLK02N.
2. The following signals are TTL compatible:
a) TTL inputs: HOLDN, RESET, PAUSEN, RDYN and OSC.
b) TTL outputs: HOLDAKN and SYNCN.
c) TTL 3 state outputs: AS, DSN, M/ION, RD/WN and IN/OPN.
d) TTL 3 state I/O signals: Address/Data Bus (AD00-AD15).
3. The clock output pins, SYSCLK1N, SYNCLK, CLKPCN and CLK02N have a higher drive capability than the
standard outputs.
4. Worst case at T
A
= +125
°
C, guaranteed but not tested at T
A
= -55
°
C.
5. The TESTN input signal is used during chip test and has an integral pullup reistor. In normal operation TESTN is at
V
DD
.
6. Guaranteed but not tested.
7.0 DC ELECTRICAL CHARACTERISTICS
Table 6: Operating DC Electrical Characteristics