参数资料
型号: MAX1148BEUP+T
厂商: Maxim Integrated Products
文件页数: 15/25页
文件大小: 0K
描述: IC ADC 14BIT 116KSPS 20-TSSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
位数: 14
采样率(每秒): 116k
数据接口: MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 1
功率耗散(最大): 879mW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 20-TSSOP
包装: 带卷 (TR)
输入数目和类型: 8 个单端,单极;8 个单端,双极;4 个差分,单极;4 个差分,双极
MAX1146–MAX1149
Multichannel, True-Differential,
Serial, 14-Bit ADCs
22
______________________________________________________________________________________
TMS32OLC3x Interface
Figure 19 shows an application circuit to interface the
MAX1146–MAX1149 to the TMS320 in external clock
mode. The timing diagram for this interface circuit is
shown in Figure 20. Use the following steps to initiate a
conversion in the MAX1146–MAX1149 and to read the
results:
1) The TMS320 should be configured with CLKX
(transmit clock) as an active-high output clock and
CLKR (TMS320 receive clock) as an active-high
input clock. CLKX and CLKR on the TMS320 are
connected together with the MAX1146–MAX1149
SCLK input.
2) Drive the CS of the MAX1146–MAX1149 low
through the XF_ I/O port of the TMS320 to clock
data into the MAX1146–MAX1149 DIN.
3) Write
an
8-bit
word
(1XXXXX11)
to
the
MAX1146–MAX1149 to initiate a conversion and
place the device into external clock mode. Refer to
Table 1 to select the proper XXXXX bit values for
your specific application.
4) The MAX1146–MAX1149 SSTRB output is moni-
tored by the FSR input of the TMS320. A falling
edge on the SSTRB output indicates that the con-
version is in progress and data is ready to be
received from the MAX1146–MAX1149.
5) The TMS320 reads in one data bit on each of the
next 16 rising edges of SCLK. These data bits rep-
resent the 14-bit conversion result followed by 2
trailing bits, which should be ignored.
6) Pull CS high to disable the MAX1146–MAX1149
until the next conversion is initiated.
Layout, Grounding, and Bypassing
Careful PC board layout is essential for best system
performance. Boards should have separate analog and
digital ground planes. Ensure that digital and analog
signals are separated from each other. Do not run ana-
log and digital (especially clock) lines parallel to one
another, or digital lines underneath the device pack-
age.
Figure 4 shows the recommended system ground con-
nections. Establish an analog ground point at AGND
and a digital ground point at DGND. Connect all analog
grounds to the star analog ground. Connect the digital
grounds to the star digital ground. Connect the digital
ground point to the analog ground point directly at the
device. For lowest noise operation, the ground return to
the star ground’s power supply should be low imped-
ance and as short as possible.
MAX1146–
MAX1149
XF
CLKX
CLKR
DX
DR
FSR
SCLK
DIN
DOUT
SSTRB
TMS320LC3x
CS
Figure 19. MAX1146–MAX1149-to-TMS320 Serial Interface
SCLK
DIN
SSTRB
DOUT
START
SEL2
SEL1
SEL0
PD1
PD0
MSB
B12
B1
LSB
HIGH-Z
CS
SGL/DIF
UNI/BIP
Figure 20. TMS320 Serial-Interface Timing Diagram
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