参数资料
型号: MAX1148BEUP+T
厂商: Maxim Integrated Products
文件页数: 6/25页
文件大小: 0K
描述: IC ADC 14BIT 116KSPS 20-TSSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
位数: 14
采样率(每秒): 116k
数据接口: MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 1
功率耗散(最大): 879mW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 20-TSSOP
包装: 带卷 (TR)
输入数目和类型: 8 个单端,单极;8 个单端,双极;4 个差分,单极;4 个差分,双极
MAX1146–MAX1149
Multichannel, True-Differential,
Serial, 14-Bit ADCs
14
______________________________________________________________________________________
BIT
NAME
DESCRIPTION
7 (MSB)
START
Start bit. The first logic 1 bit after CS goes low defines the beginning of the control byte.
6
SEL2
5
SEL1
4
SEL0
Channel-select bits. The channel-select bits select which of the eight channels are used for the conversion
(Tables 2, 3, 4, and 5).
3
SGL/DIF
1 = single ended, 0 = differential. Selects single-ended or differential conversions. In single-ended mode,
input signal voltages are referred to COM. In differential mode, the voltage difference between two channels
is measured.
2
UNI/BIP
1 = unipolar, 0 = bipolar. Selects unipolar or bipolar conversion mode. In unipolar mode, connect COM to
AGND to perform conversion from 0 to VREF. In bipolar mode, connect COM to VREF/2 to perform conversion
from 0 to VREF. See Table 7.
1
PD1
0 (LSB)
PD0
Selects clock and power-down modes.
PD1 = 0 and PD0 = 0 selects full power-down mode*.
PD1 = 0 and PD0 = 1 selects fast power-down mode*.
PD1 = 1 and PD0 = 0 selects internal clock mode.
PD1 = 1 and PD0 = 1 selects external clock mode.
Table 1. Control Byte Format
MAX1148
MAX1149
OSCILLOSCOPE
CH1
CH2
CH3
CH4
*FULL-SCALE ANALOG INPUT, CONVERSION RESULT = $FFF HEX
SCLK
SSTRB
DOUT*
DOUT
SSTRB
SCLK
DIN
VDD
DGND
AGND
COM
0.01
F
0.01
F
2.2
F
EXTERNAL CLOCK
CH7
REFADJ
REF
MAX1149 VREF = +2.500V
MAX1148 VREF = +4.096V
VREF
AIN
VDD
10
10
VCOM
≤ AIN ≤ VREF
SHDN
CS
0.1
F
4.7
F
Figure 7. Quick-Look Circuit
*The start bit resets power-down modes.
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