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参数资料
| 型号： | MAX15003ATM+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 12/31页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 48TQFN-EP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| PWM 型： | 电压模式 |
| 输出数： | 3 |
| 频率 - 最大： | 2.2MHz |
| 电源电压： | 5.5 V ~ 23 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 48-WFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
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MAX15003
Triple-Output Buck Controller with
Tracking/Sequencing
Pin Description (continued)
12
PIN
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
—
NAME
EN/TRACK3
COMP3
ILIM3
CSP3
CSN3
BST3
DH3
LX3
DREG3
DL3
PGND3
SYNC
SGND
RT
PHASE
RESET
EP
FUNCTION
Controller 3 Enable/Tracking Input. See Figure 2.
When sequencing, EN/TRACK3 must be above 1.24V for the PWM controller 3 to start.
Coincident tracking—connect the same resistive divider used for FB3, from Output 1 to EN/TRACK3 to
SGND.
Ratiometric tracking—connect EN/TRACK3 to analog ground.
Controller 3 Error Transconductance Amplifier Output. Connect COMP3 to the compensation feedback
network.
Controller 3 Valley Current-Limit Set Output. Connect a 25k ? to 150k ? resistor, R ILIM3 , from ILIM3 to SGND
to program the valley current-limit threshold from 50mV to 300mV. ILIM3 sources 20μA out to R ILIM3 . The
resulting voltage divided by 10 is the valley current-limit threshold. When using a precision current-sense
resistor, connect a resistive divider from REG to ILIM3 to SGND to set the valley current limit. See Figure 11.
Controller 3 Positive Current-Sense Input. Connect CSP3 to the synchronous MOSFET source (connected to
PGND3). When using a current-sense resistor, connect CSP3 to the PGND3 end of the current-sense
resistor.
Controller 3 Negative Current-Sense Input. Connect CSN3 to the synchronous MOSFET drain (connected to
LX3). When using a current-sense resistor, connect CSN3 to the junction of low-side MOSFET’s source and
the current-sense resistor. See Figure 11.
Controller 3 High-Side Gate Driver Supply. Connect BST3 to the cathode of the boost diode and to the
positive terminal of the boost capacitor.
Controller 3 High-Side Gate Driver Output. DH3 drives the gate of the high-side MOSFET.
Controller 3 High-Side MOSFET Source Connection/Synchronous MOSFET Drain Connection. Connect the
inductor and the negative side of the boost capacitor to LX3.
Controller 3 Low-Side Gate Driver Supply. Connect externally to REG and anode of the boost diode.
Connect a minimum of 0.1μF ceramic capacitor from DREG3 to PGND3.
Controller 3 Low-Side Gate Driver Output. DL3 is the gate driver output for the synchronous MOSFET.
Controller 3 Power-Ground Connection. Connect the input filter capacitor’s negative terminal, the source of
the synchronous MOSFET, and the output filter capacitor’s return to PGND3. Connect externally to SGND at
a single point near the input capacitor return terminal.
Synchronization Input. Drive with a frequency at least 20% higher than three times the frequency
programmed using the RT pin. The switching frequency is 1/3 the SYNC frequency. Connect SYNC to
SGND when not used.
Analog Ground Connection. Connect SGND and PGND_ together at one point near the input bypass
capacitor return terminal.
Oscillator Timing Resistor Connection. Connect a 500k ? to 45k ? resistor from RT to SGND to program the
switching frequency from 200kHz to 2.2MHz.
Phase Select Input. Connect PHASE to SGND for 120° out-of-phase operation between the controllers.
Connect to REG for in phase operation.
RESET Output. Open-drain RESET output releases after all PGOODs are released and timeout programmed
by CT finishes.
Exposed Pad. Solder the exposed pad to a large SGND plane.
Maxim Integrated
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