参数资料
型号: MAX15003ATM+T
厂商: Maxim Integrated Products
文件页数: 20/31页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 48TQFN-EP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
PWM 型: 电压模式
输出数: 3
频率 - 最大: 2.2MHz
电源电压: 5.5 V ~ 23 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 48-WFQFN 裸露焊盘
包装: 带卷 (TR)
MAX15003
Triple-Output Buck Controller with
Tracking/Sequencing
Setting the Current Limit
Connect a 25k ? to 150k ? resistor, R ILIM , from ILIM to
SGND to program the valley current-limit threshold
(V CL ) from 50mV to 300mV. ILIM sources 20μA out to
1.5
VALLEY CURRENT-LIMIT THRESHOLD
AND R DS(ON) vs. TEMPERATURE
R ILIM . The resulting voltage divided by 10 is the valley
current-limit threshold.
The MAX15003 uses a valley current-sense method for
current limiting. The voltage drop across the low-side
MOSFET due to its on-resistance is used to sense the
inductor current. The voltage drop (V VALLEY ) across the
low-side MOSFET at the valley point and at I LOAD is:
1.4
1.3
1.2
1.1
1.0
0.9
0.8
R DS(ON)
V ILIM
V VALLEY = R DS ( ON ) × ? I LOAD
?
?
?
? I P ? P ?
?
2 ?
0.7
0.6
0.5
R ILIM = 25.5k ?
R DS(ON) is the on-resistance of the low-side MOSFET,
I LOAD is the rated load current, and ? I P-P is the peak-
to-peak inductor current.
The R DS(ON) of the MOSFET varies with temperature.
Calculate the R DS(ON) of the MOSFET at its operating
junction temperature at full load using the MOSFET
datasheet. To compensate for this temperature varia-
tion, the 20μA ILIM reference current has a temperature
coefficient of 3333ppm/°C. This allows the valley cur-
rent-limit threshold (V CL ) to track and partially compen-
sate for the increase in the synchronous MOSFET’s
R DS(ON) with increasing temperature. Use the following
equation to calculate R ILIM :
-50 -30 -10 10 30 50 70 90 110 130 150
TEMPERATURE ( ° C)
Figure 4. Current-Limit Trip Point and V RDS(ON) vs.
Temperature
Compensation Design Guidelines
The MAX15003 uses a fixed-frequency, voltage-mode
control scheme that regulates the output voltage by dif-
ferentially comparing the “sampled ” output voltage
against a fixed reference. The subsequent error voltage
that appears at the error amplifier output (COMP) is
compared against an internal ramp voltage to generate
the required duty cycle of the pulse-width modulator. A
? ? IP ? P ?
RDS ( ON ) × ? ICL ( MAX ) ? ? × 10
( T ? 25 ° C ) ???
20 × 10
1 + 3 . 333 × 10
R ILIM =
? 6 ? ? 3
??
? 2 ?
second order lowpass LC filter removes the switching
harmonics and passes the DC component of the pulse-
width-modulated signal to the output. The LC filter,
which has an attenuation slope of -40dB/decade, intro-
duces 180° of phase shift at frequencies above the LC
Figure 4 illustrates the effect of the MAX15003 ILIM ref-
erence current temperature coefficient to compensate
for the variation of the MOSFET R DS(ON) over the oper-
ating junction temperature range.
Power MOSFET Selection
When choosing the MOSFETs, consider the total gate
charge, R DS(ON) , power dissipation, the maximum drain-
to-source voltage and package thermal impedance. The
product of the MOSFET gate charge and on-resistance is
a figure of merit, with a lower number signifying better
performance. Choose MOSFETs that are optimized for
high-frequency switching applications. The average gate-
drive current from the MAX15003’s output is proportional
to the frequency and gate charge required to drive the
MOSFET. The power dissipated in the MAX15003 is pro-
portional to the input voltage and the average drive cur-
rent (see the Power Dissipation section).
20
resonant frequency. This phase shift, in addition to the
inherent 180° of phase shift of the regulator’s self-gov-
erning (negative) feedback system, poses the potential
for positive feedback. The error amplifier and its associ-
ated circuitry are designed to compensate for this insta-
bility to achieve a stable closed-loop system.
The basic regulator loop consists of a power modulator
(comprises the regulator’s pulse-width modulator, asso-
ciated circuitry, and LC filter), an output feedback
divider, and an error amplifier. The power modulator
has a DC gain set by V IN / V RAMP , with a double pole
and a single zero set by the output inductance (L), the
output capacitance (C OUT ), and its equivalent series
resistance (ESR). A second, higher frequency zero also
exists, which is a function of the output capacitor’s ESR
and ESL); though only taken into account when using
very high-quality filter components and/or frequencies
of operation.
Maxim Integrated
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