参数资料
型号: MAX15003ATM+T
厂商: Maxim Integrated Products
文件页数: 29/31页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 48TQFN-EP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
PWM 型: 电压模式
输出数: 3
频率 - 最大: 2.2MHz
电源电压: 5.5 V ~ 23 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 48-WFQFN 裸露焊盘
包装: 带卷 (TR)
MAX15003
Triple-Output Buck Controller with
Tracking/Sequencing
PWM Controller
Applications Information
Power Dissipation
The 48-pin TQFN thermally enhanced package can dis-
sipate up to 3.08W. Calculate power dissipation in the
MAX15003 as a product of the input voltage and the
total REG output current (I REG ). I REG includes quies-
cent current (I Q ) and the total gate drive current
(I DREG ):
P D = V IN x I REG
I REG = I Q + [f SW x (Q G1 + Q G2 + Q G3 + Q G4 + Q G5 +
Q G6 )]
where Q G1 to Q G6 are the total gate charge of the low-
side and high-side external MOSFETs. f SW is the
switching frequency of the converter and I Q is the qui-
escent current of the device at the switching frequency.
Use the following equation to calculate the maximum
power dissipation (P DMAX ) in the chip at a given ambi-
ent temperature (T A ):
P DMAX = 38.5 x (150 - T A )……….mW
PCB Layout Guidelines
Use the following guidelines to layout the switching
voltage regulator.
1) Place the IN, REG, and DREG_ bypass capacitors
close to the MAX15003.
2) Minimize the area and length of the high-current
loops from the input capacitor, upper switching
MOSFET, inductor, and output capacitor back to
the input capacitor negative terminal.
Maxim Integrated
3) Keep the current loop formed by the lower switch-
ing MOSFET, inductor, and output capacitor short.
4) Keep SGND and PGND isolated and connect them
at one single point close to the negative terminal of
the input filter capacitor.
5) Run the current-sense lines CSP_ and CSN_ close
to each other to minimize the loop area.
6) Avoid long traces between the DREG_ bypass
capacitor, low-side driver outputs of the
MAX15003, MOSFET gate, and PGND. Minimize
the loop formed by the DREG_ bypass capacitor,
bootstrap diode, bootstrap capacitor, high-side dri-
ver output of the MAX15003, and upper MOSFET
gates.
7) Place the bank of output capacitors close to the
load.
8) Distribute the power components evenly across the
board for proper heat dissipation.
9) Provide enough copper area at and around the
switching MOSFETs, and inductor to aid in thermal
dissipation.
10) Connect the MAX15003 exposed paddle to a large
copper plane to maximize its power dissipation
capability. Connect the exposed paddle to SGND.
Do not connect the exposed paddle to the SGND
pin (pin 45) directly underneath the IC.
11) Use 2oz copper to keep the trace inductance and
resistance to a minimum. Thin copper PCBs com-
promise efficiency because high currents are
involved in the application. Also, thicker copper
conducts heat more effectively, thereby reducing
thermal impedance.
29
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