参数资料
型号: MAX15035ETL+T
厂商: Maxim Integrated Products
文件页数: 11/27页
文件大小: 0K
描述: IC REG BOOST SYNC 15A 40TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 升压(升压)
输出类型: 固定
输出数: 1
输出电压: 1.05V,1.5V
输入电压: 4.5 V ~ 26 V
PWM 型: 电流模式
电流 - 输出: 15A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 40-WFQFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 40-TQFN-EP(6x6)
15A Step-Down Regulator with Internal Switches
Pin Description (continued)
PIN
32
33
34
35
36
37
38
EP1
(41)
EP2
(42)
EP3
(43)
NAME
FB
ILIM
REFIN
REF
SKIP
V CC
PGOOD
AGND
LX
IN
FUNCTION
Feedback Voltage Sense Connection. Connect directly to the positive terminal of the output capacitors
for output voltages less than 2V as shown in Figure 1. For fixed-output voltages greater than 2V,
connect REFIN to REF and use a resistive divider to set the output voltage (Figure 6). FB senses the
output voltage to determine the on-time for the high-side switching MOSFET.
Current-Limit Threshold Adjustment. The current-limit threshold is 0.05 times (1/20) the voltage at
ILIM. Connect ILIM to a resistive divider (from REF) to set the current-limit threshold between 20mV
and 100mV (with 0.4V to 2V at ILIM).
External Reference Input. REFIN sets the feedback regulation voltage (V FB = V REFIN ) of the
MAX15035 using a resistor-divider connected between REF and AGND. The MAX15035 includes an
internal window comparator to detect REFIN voltage transitions, allowing the controller to blank
PGOOD and the fault protection.
2V Reference Voltage. Bypass to analog ground using a 1nF ceramic capacitor. The reference can
source up to 50μA for external loads.
Pulse-Skipping Control Input. This four-level input determines the mode of operation under normal
steady-state conditions and dynamic output-voltage transitions:
V DD (5V) = Forced-PWM operation
REF (2V) = Pulse-skipping mode (with forced-PWM during transitions)
Open (3.3V) = Ultrasonic mode (without forced-PWM during transitions)
GND = Pulse-skipping mode (without forced-PWM during transitions)
5V Analog Supply Voltage. Internally connected to V DD through an internal 20 Ω resistor. Bypass V CC
to analog ground using a 1μF ceramic capacitor.
Open-Drain Power-Good Output. PGOOD is low when the output voltage is more than 200mV (typ)
below or 300mV (typ) above the target voltage (V REFIN ), during soft-start, and soft-shutdown. After
the soft-start circuit has terminated, PGOOD becomes high impedance if the output is in regulation.
PGOOD is blanked—forced high-impedance state—when a dynamic REFIN transition is detected.
Exposed Pad 1/Analog Ground. Internally connected to the controller’s ground plane and substrate.
Connect directly to ground.
Exposed Pad 2/Inductor Connection. Internally connected to drain of the low-side MOSFET and
source of the high-side MOSFET (Figure 2). Connect LX to the switched side of the inductor as
shown in Figure 1.
Exposed Pad 3/Power MOSFET Input Power Source. Internally connected to drain of the high-side
MOSFET (Figure 2).
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11
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