参数资料
型号: MAX15058EWL+T
厂商: Maxim Integrated Products
文件页数: 11/21页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 3A 9WLP
产品培训模块: Obsolescence Mitigation Program
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.6 V ~ 5.17 V
输入电压: 2.7 V ~ 5.5 V
PWM 型: 电流模式
频率 - 开关: 1MHz
电流 - 输出: 3A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 9-WFBGA,WLBGA
包装: 带卷 (TR)
供应商设备封装: 9-WLP(1.5x1.5)
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
Detailed Description
The MAX15058 high-efficiency, current-mode switching
regulator can deliver up to 3A of output current. The
MAX15058 provides output voltages from 0.6V to 0.94 x
V IN from 2.7V to 5.5V input supplies, making the device
ideal for on-board point-of-load applications.
The MAX15058 delivers current-mode control archi-
tecture using a high-gain transconductance error
amplifier. The current-mode control architecture facilitates
easy compensation design and ensures cycle-by-cycle
current limit with fast response to line and load transients.
The MAX15058 features a 1MHz fixed switching fre-
quency, allowing for all-ceramic capacitor designs and
fast transient responses. The high operating frequency
minimizes the size of external components. The
MAX15058 is available in a 1.5mm x 1.5mm (3 x 3 array)
x 0.5mm pitch WLP package.
The MAX15058 offers a selectable skip-mode functional-
ity to reduce current consumption and achieve a higher
efficiency at light output loads. The low R DS(ON) integrat-
ed switches (30m I high-side and 18m I low-side, typ)
ensure high efficiency at heavy loads while minimizing
critical inductances, making the layout design a much
simpler task with respect to discrete solutions. Utilizing
a simple layout and footprint assures first-pass success
in new designs.
The MAX15058 features 1MHz Q 15%, factory-trimmed,
fixed-frequency PWM mode operation. The MAX15058 also
offers capacitor-programmable, soft-start reducing inrush
current, startup into PREBIAS operation, and a PGOOD
open-drain output for sequencing with other devices.
Controller Function—PWM Logic
The controller logic block is the central processor that
determines the duty cycle of the high-side MOSFET
under different line, load, and temperature conditions.
Under normal operation, where the current-limit and
temperature protection are not triggered, the controller
logic block takes the output from the PWM comparator
and generates the driver signals for both high-side and
low-side MOSFETs. The control logic block controls the
break-before-make logic and all the necessary timing.
The high-side MOSFET turns on at the beginning of
the oscillator cycle and turns off when the COMP volt-
age crosses the internal current-mode ramp waveform,
which is the sum of the slope compensation ramp and
the current-mode ramp derived from inductor current
(current-sense block). The high-side MOSFET also turns
off if the maximum duty cycle is 94%, or when the current
limit is reached. The low-side MOSFET turns on for the
remainder of the oscillation cycle.
Starting into a Prebiased Output
The MAX15058 can soft-start into a prebiased output
without discharging the output capacitor. In safe pre-
biased startup, both low-side and high-side MOSFETs
remain off to avoid discharging the prebiased output.
PWM operation starts when the voltage on SS/REFIN
crosses the voltage on FB.
The MAX15058 can start into a prebiased voltage higher
than the nominal set point without abruptly discharging
the output. Forced PWM operation starts when the SS/
REFIN voltage reaches 0.58V (typ), forcing the converter
to start. In case of prebiased output, below or above
the output nominal set point, if low-side sink current-limit
threshold (set to the reduced value of -0.4A (typ) for the
first 32 clock cycles and then set to -5A (typ)) is reached,
the low-side switch turns off before the end of the clock
period, and the high-side switch turns on until one of the
following conditions is satisfied:
?  High-side source current hits the reduced high-side 
current limit (0.4A, typ); in this case, the high-side
switch is turned off for the remaining time of the clock
period.
?  The  clock  period  ends.  Reduced  high-side  current 
limit is activated to recirculate the current into the
high-side power switch rather than into the internal
high-side body diode, which could be damaged.
Low-side sink current limit is provided to protect the
low-side switch from excessive reverse current dur-
ing prebiased operation.
In skip mode operation, the prebias output needs to be
lower than the set point.
Enable Input
The MAX15058 features independent device enable
control and power-good signal that allow for flexible
power sequencing. Drive the enable input (EN) high to
enable the regulator, or connect EN to IN for always-on
operation. Power-good (PGOOD) is an open-drain out-
put that asserts when V FB is above 555mV (typ), and
deasserts low if V FB is below 527mV (typ).
Programmable Soft-Start (SS/REFIN)
The MAX15058 utilizes a soft-start feature to slowly ramp
up the regulated output voltage to reduce input inrush
current during startup. Connect a capacitor from SS/
REFIN to GND to set the startup time (see the Setting the
Soft-Start Time section for capacitor selection details).
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