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| 型号： | MAX15058EWL+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 16/21页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 3A 9WLP |
| 产品培训模块： | Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.6 V ~ 5.17 V |
| 输入电压： | 2.7 V ~ 5.5 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1MHz |
| 电流 - 输出： | 3A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 9-WFBGA，WLBGA |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 9-WLP（1.5x1.5） |
High-Efficiency, 3A, Current-Mode
Synchronous, Step-Down Switching Regulator
1ST ASYMPTOTE
R2 × (R1 + R2) -1 × 10 AVEA(dB)/20 × g MC × R LOAD × {1 + R LOAD × [K S × (1 - D) - 0.5] × (L × f SW ) -1 } -1
GAIN
2ND ASYMPTOTE
R2 × (R1 + R2) -1 × g MV × (2 G C C ) -1 × g MC × R LOAD × {1 + R LOAD × [K S × (1 - D) - 0.5] × (L × f SW ) -1 } -1
3RD ASYMPTOTE
R2 × (R1 + R2) -1 × g MV × (2 G C C ) -1 × g MC × R LOAD × {1 + R LOAD × [K S × (1 - D) - 0.5] × (L × f SW ) -1 } -1 ×
(2 G C OUT × {R LOAD-1 + [K S × (1 - D) - 0.5] × (L × f SW ) -1 } -1 ) -1
4TH ASYMPTOTE
R2 × (R1 + R2) -1 × g MV × R C × g MC × R LOAD × {1 + R LOAD × [K S × (1 - D) - 0.5] × (L × f SW ) -1 } -1 ×
(2GC OUT × {R LOAD-1 + [K S × (1 - D) - 0.5] × (L × f SW ) -1 } -1 ) -1
UNITY
1ST POLE
[2GC C ×(10 AVEA(dB)/20 -g MV-1 )] -1
2ND POLE
f PMOD *
1ST ZERO
(2 G C C R C ) -1
NOTE:
R OUT = 10 AVEA(dB)/20 × g MV-1
f CO
3RD POLE (DBL)
0.5 × f SW
2ND ZERO
(2 G C OUT ESR) -1
FREQUENCY
5TH ASYMPTOTE
R2 × (R1 + R2) -1 × g MV × R C × g MC × R LOAD × {1 + R LOAD × [K S × (1 - D) - 0.5] × (L × f SW ) -1 } -1 ×
(2 G C OUT × {R LOAD-1 + [K S × (1 - D) - 0.5] × (L × f SW ) -1 } -1 ) -1 × (0.5 × f SW ) 2 × (2 G f) -2
f PMOD =
? K S × ( 1 ? D ) ? 0.5 ? ? ?
? ? 1 ?
?
+ ?
2 π × C OUT × ? ESR + ?
?
? R LOAD SW × L
?
?
1 ? K S × ( 1 ? D ) ? 0.5 ?
f PMOD =[2GC OUT ×(ESR+{R LOAD-1 +[K S ×(1-D)-0.5]×(L×f SW ) -1 } -1 )] -1
WHICH FOR
ESR << {R LOAD-1 + [K S × (1 - D) - 0.5] × (L × f SW ) -1 } -1
BECOMES
f PMOD = [2 G C OUT × {R LOAD-1 + [K S × (1 - D) - 0.5] × (L × f SW ) -1 } -1 ] -1
f PMOD = (2 G C OUT × R LOAD ) -1 + [K S × (1 - D) - 0.5] × (2 G C OUT × L × f SW ) -1
Figure 3. Asymptotic Loop Response of Current-Mode Regulator
As previously mentioned, the power modulator’s dominant
pole is a function of the parallel effects of the load resis-
tance and the current-loop gain’s equivalent impedance:
1
1 ?
? f ? ?
? ?
? ?
And knowing that the ESR is typically much smaller than
the parallel combination of the load and the current loop:
6TH ASYMPTOTE
R2 × (R1 + R2) -1 × g MV × R C × g MC × R LOAD × {1 + R LOAD × [K S × (1 - D) - 0.5] × (L × f SW ) -1 } -1 ×
ESR × {R LOAD-1 + [K S × (1 - D) - 0.5] × (L × f SW ) -1 } -1 × (0.5 × f SW ) 2 × (2 G f) -2
which can be expressed as:
f PMOD ≈ + ?
2 π × C OUT × R LOAD 2 π × f SW × L × C OUT
Note: Depending on the application’s specifics, the
amplitude of the slope compensation ramp could have
a significant impact on the modulator’s dominate pole.
For low duty-cycle applications, it provides additional
damping (phase lag) at/near the crossover frequency
(see the Closing the Loop: Designing the Compensation
? K S × ( 1 ? D ) ? 0.5 ? ? ?
?
+ ?
ESR << ?
?
? R LOAD SW × L
?
?
f PMOD ≈
? K S × ( 1 ? D ) ? 0.5 ? ? ?
?
+ ?
2 π × C OUT × ?
?
? R LOAD
f SW × L
?
?
f ZMOD ZESR =
= f
1
1
1
f ?
? 1
?
? 1
Circuitry section). There is no equivalent effect on the
power modulator zero, f ZMOD .
1
2 π × C OUT × ESR
16
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