参数资料
型号: MAX1533AETJ+T
厂商: Maxim Integrated Products
文件页数: 13/38页
文件大小: 0K
描述: IC POWER SUPPLY CONTROLER 32TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: 电源控制器
输入电压: 4.5 V ~ 26 V
电流 - 电源: 15µA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-WFQFN 裸露焊盘
供应商设备封装: 32-TQFN-EP(5x5)
包装: 带卷 (TR)
High-Efficiency, 5x Output, Main Power-Supply
Controllers for Notebook Computers
Pin Description
PIN
MAX1533A
MAX1537A
NAME
FUNCTION
Auxiliary Feedback Input. Connect a resistive voltage-divider from LDOA to analog
1
ADJA
ground to adjust the auxiliary linear-regulator output voltage. ADJA regulates at 2V.
Connect ADJA to GND for nominal 12V output using internal feedback.
5V SMPS Enable Input. The 5V SMPS is enabled if ON5 is greater than the SMPS on
1
2
ON5
level and disabled if ON5 is less than the SMPS off level. If ON5 is connected to REF,
the 5V SMPS starts after the 3.3V SMPS reaches regulation (delay start). Drive ON5
below the clear fault level to reset the fault latches.
3.3V SMPS Enable Input. The 3.3V SMPS is enabled if ON3 is greater than the SMPS
2
3
ON3
on level and disabled if ON3 is less than the SMPS off level. If ON3 is connected to
REF, the 3.3V SMPS starts after the 5V SMPS reaches regulation (delay start). Drive
ON3 below the clear fault level to reset the fault latches.
LDOA Enable Input. When ONA is low, LDOA is high impedance and the secondary
4
ONA
winding control is off. When ONA is high, LDOA is on. Connect to LDO3, LDO5,
CSL3, CSL5, or other output for desired automatic startup sequencing.
Frequency-Select Input. This three-level logic input sets the controller’s switching
3
5
FSEL
frequency. Connect to GND, REF, or V CC to select the following typical switching
frequencies:
V CC = 500kHz, REF = 300kHz, GND = 200kHz
3.3V SMPS Peak Current-Limit Threshold Adjustment. The current-limit threshold
defaults to 75mV if ILIM3 is connected to V CC . In adjustable mode, the current-limit
4
6
ILIM3
threshold across CSH3 and CSL3 is precisely 1/10 the voltage seen at ILIM3 over a
500mV to 2.0V range. The logic threshold for switchover to the 75mV default value is
approximately V CC - 1V.
5V SMPS Peak Current-Limit Threshold. The current-limit threshold defaults to 75mV if
5
7
ILIM5
ILIM5 is connected to V CC . In adjustable mode, the current-limit threshold across CSH5
and CSL5 is precisely 1/10th the voltage seen at ILIM5 over a 500mV to 2.0V range. The
logic threshold for switchover to the 75mV default value is approximately V CC - 1V.
2.0V Reference Voltage Output. Bypass REF to analog ground with a 0.1μF or greater
6
8
REF
ceramic capacitor. The reference can source up to 100μA for external loads. Loading
REF degrades output-voltage accuracy according to the REF load-regulation error.
The reference shuts down when SHDN is low.
7
9
GND
Analog Ground. Connect the backside pad to GND.
Analog Supply Input. Connect to the system supply voltage (+4.5V to +5.5V) through
8
10
V CC
a series 20 Ω resistor. Bypass V CC to analog ground with a 1μF or greater ceramic
capacitor.
Power-Good One-Shot Delay. Place a timing capacitor on PGDLY to delay PGOOD
9
11
PGDLY
going high. PGDLY has a 5μA pullup current and a 10 Ω pulldown. The pulldown is
activated when power is not good. When power is good, the pulldown is shut off and
the 5μA pullup is activated. When PGDLY crosses REF, PGOOD is enabled.
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