参数资料
型号: MAX1533AETJ+T
厂商: Maxim Integrated Products
文件页数: 5/38页
文件大小: 0K
描述: IC POWER SUPPLY CONTROLER 32TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: 电源控制器
输入电压: 4.5 V ~ 26 V
电流 - 电源: 15µA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-WFQFN 裸露焊盘
供应商设备封装: 32-TQFN-EP(5x5)
包装: 带卷 (TR)
High-Efficiency, 5x Output, Main Power-Supply
Controllers for Notebook Computers
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V IN = 12V, both SMPS enabled, V CC = 5V, FSEL = REF, SKIP = GND, V ILIM_ = V LDO5 , V INA = 15V, V LDOA = 12V,
I LDO5 = I LDO3 = I LDOA = no load, T A = 0°C to +85°C , unless otherwise noted. Typical values are at T A = +25°C.)
PARAMETER
Output Undervoltage-Protection
Trip Threshold
Output Undervoltage Fault-
Propagation Delay
Output Undervoltage-Protection
Blanking Time
PGOOD Lower Trip Threshold
PGOOD Propagation Delay
SYMBOL
t UVP
t BLANK
t PGOOD _
CONDITIONS
With respect to error-comparator threshold
50mV overdrive
From rising edge of ON_
With respect to error-comparator
threshold, hysteresis = 1%
Falling edge, 50mV overdrive
MIN
65
-14
TYP
70
10
6144/
f OSC
-10
10
MAX
75
-7.5
UNITS
%
μs
s
%
μs
PGOOD Output Low Voltage
I SINK = 4mA
0.4
V
PGOOD Leakage Current
I PGOOD _
High state, PGOOD forced to 5.5V
1
μA
PGDLY Pullup Current
PGDLY Pulldown Resistance
PGDLY Trip Threshold
Thermal-Shutdown Threshold
T SHDN
PGDLY = GND
Hysteresis = 15 ° C
4
REF-
0.2
5
10
REF
+160
6
25
REF+
0.2
μA
Ω
V
° C
GATE DRIVERS
DH_ Gate-Driver On-Resistance
DL_ Gate-Driver On-Resistance
DH_ Gate-Driver Source/Sink
Current
DL_ Gate-Driver Source Current
DL_ Gate-Driver Sink Current
Dead Time
LX_, BST_ Leakage Current
R DH
R DL
I DH
I DL
I DL (SINK)
t DEAD
BST_ - LX_ forced to 5V
DL_, high state
DL_, low state
DH_ forced to 2.5V,
BST_ - LX_ forced to 5V
DL_ forced to 2.5V
DL_ forced to 2.5V
DL_ rising
DH_ rising
V BST _ = V LX _ = 26V
1.5
1.7
0.6
2
1.7
3.3
35
26
<2
5
5
3
20
Ω
Ω
A
A
A
ns
μA
INPUTS AND OUTPUTS
Logic Input Voltage
Fault Enable Logic Input Voltage
SKIP , hysteresis = 600mV
OVP , UVP , ONA
High
Low
High
2.4
0.7 x
V CC
0.8
V
V
Low
0.4
Logic Input Current
OVP , UVP , SKIP , ONA
-1
+1
μA
SHDN Input Trip Level
Rising trip level
Falling trip level
1.10
0.96
1.6
1
2.20
1.04
V
Clear fault level/SMPS off level
0.8
ON_ Input Voltage
Delay start level (REF)
1.9
2.1
V
SMPS on level
2.4
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5
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